SPRUIW7A October 2020 – February 2022
The J7200 EVM boards are identified by its version and serial number, which are stored in the onboard EEPROM. The EEPROM is accessible from WKUP I2C0 port of J7200 processor.
The board ID EEPROM I2C slave address of various boards are listed in the I2C mapping table.
The J7200 SoM board includes a CAV24C256WEI2C EEPROM ID memory. The first 259 bytes of addressable EEPROM memory are pre-programmed with identification information for each board. The remaining 32509 bytes are available to the user for data or code storage.
Header | Field Name | Size (bytes) | Value for J7200 SOM | Comments |
---|---|---|---|---|
EE3355AA | MAGIC | 4 | 0xEE3355AA | Magic Number |
TYPE | 1 | 0x10 | Fixed length and variable position board ID header | |
2 | 37 | Size of payload | ||
BRD_INFO | TYPE | 1 | 0x10 | payload type |
Length | 2 | 0x2E | Offset to next header | |
Board_Name | 16 | J7200X-PM2-SOM | Name of the board | |
Design_Rev | 2 | E6 | Revision number of the design | |
PROC_Nbr | 4 | 105 | PROC number | |
Variant | 2 | 0x3 | Design variant number | |
PCB_Rev | 2 | E6 | Revision number of the PCB | |
SCHBOM_Rev | 2 | 0x0 | Revision number of the schematic | |
SWR_Rev | 2 | 0x1 | first software release number | |
VendorID | 2 | 0x1 | ||
Build_Week | 2 | Week of the year of production | ||
Build_Year | 2 | Year of production | ||
BoardID | 6 | |||
Serial_Nbr | 4 | Incrementing board number | ||
DDR_INFO | TYPE | 1 | 0x11 | |
Length | 2 | 0x2 | Offset to next header | |
DDR control | 2 | 0x7D60 | DDR Control Word | |
MAC_ADDR | TYPE | 1 | payload type | |
Length | 2 | Size of payload | ||
MAC control | 2 | MAC header control word | ||
MAC_adrs | 192 | |||
END_LIST | TYPE | 1 | 0xFE | End Marker |