SPRUJC0 April   2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Hardware Description
      1. 2.1.1 Functional Description and Connections
        1. 2.1.1.1  Power Domains
        2. 2.1.1.2  LEDs
        3. 2.1.1.3  Encoder Connectors
        4. 2.1.1.4  FSI
        5. 2.1.1.5  PGA
        6. 2.1.1.6  CAN
        7. 2.1.1.7  CLB
        8. 2.1.1.8  Boot Modes
        9. 2.1.1.9  BoosterPack Sites
        10. 2.1.1.10 Analog Voltage Reference Header
        11. 2.1.1.11 Other Headers and Jumpers
          1. 2.1.1.11.1 USB Isolation Block
          2. 2.1.1.11.2 BoosterPack Site 2 Power Isolation
          3. 2.1.1.11.3 Alternate Power
      2. 2.1.2 Debug Interface
        1. 2.1.2.1 XDS110 Debug Probe
        2. 2.1.2.2 XDS110 Output
        3. 2.1.2.3 Virtual COM Port
      3. 2.1.3 Alternate Routing
        1. 2.1.3.1 Overview
        2. 2.1.3.2 UART Routing
        3. 2.1.3.3 EQEP Routing
        4. 2.1.3.4 CAN Routing
        5. 2.1.3.5 PGA Routing
        6. 2.1.3.6 FSI Routing
        7. 2.1.3.7 X1/X2 Routing
        8. 2.1.3.8 PWM DAC
    2. 2.2 Using the F28P55x LaunchPad
    3. 2.3 BoosterPacks
    4. 2.4 Hardware Revisions
      1. 2.4.1 Revision A
  9. 3Software
    1. 3.1 Software Development
      1. 3.1.1 Software Tools and Packages
      2. 3.1.2 F28P55x LaunchPad Demo Program
      3. 3.1.3 Programming and Running Other Software on the F28P55x LaunchPad
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 LAUNCHXL-F28P55X Board Dimensions
    3. 4.3 Bill of Materials (BOM)
  11. 5Additional Information
    1. 5.1 Frequently Asked Questions
    2. 5.2 Trademarks
  12. 6References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design

2.1.1.1 Power Domains

The F28P55x LaunchPad has several power domains that can be connected or isolated from each other with removable shunts. The different 3.3V and 5V power domains are further described in Figure 3-2 and Figure 3-3.

GUID-20211228-SS0I-TXZH-M5LM-SSDBZSRP1SGQ-low.svg Figure 2-2 LaunchPad Power Distribution Diagram
GUID-20240408-SS0I-3NQS-VHW3-S9GKFBWBRBNB-low.svg Figure 2-3 LaunchPad Power Plane Diagram

Table 3-1 describes the usage of the different removable shunts on the LaunchPad board.

Table 2-1 Power Domain Shunts
Shunt IdentifierUsage Description
JP1, +5V0Connects the +5 V power from the USB-C connector (+5V0_USB) to the +5 V power on the XDS110 side of the board (+5V0_XDS110). Bridges the power and ground isolations between the two board sides.
JP1, GNDConnects the board Ground on the isolated USB-C connector side of the board (USB_GND) to the rest of the board ground (GND). Bridges the power and ground isolations between the two board sides.
JP2, +5V0Connects the +5 V power on the XDS110 side of the board (+5V0_XDS110) to the +5 V power on the F28P55X side of the board (+5V0_MCU).
JP2, +3V3Connects the +3.3 V power on the XDS110 side of the board (+3V3_XDS110) to the +3.3 V power on the F28P55X side of the board (+3V3_MCU).