TIDUES0E June   2019  – April 2024 TMS320F28P550SJ , TMS320F28P559SJ-Q1

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1  UCC21710
      2. 2.2.2  UCC14141-Q1
      3. 2.2.3  AMC1311
      4. 2.2.4  AMC1302
      5. 2.2.5  OPA320
      6. 2.2.6  AMC1306M05
      7. 2.2.7  AMC1336
      8. 2.2.8  TMCS1133
      9. 2.2.9  TMS320F280039C
      10. 2.2.10 TLVM13620
      11. 2.2.11 ISOW1044
      12. 2.2.12 TPS2640
    3. 2.3 System Design Theory
      1. 2.3.1 Dual Active Bridge Analogy With Power Systems
      2. 2.3.2 Dual-Active Bridge – Switching Sequence
      3. 2.3.3 Dual-Active Bridge – Zero Voltage Switching (ZVS)
      4. 2.3.4 Dual-Active Bridge - Design Considerations
        1. 2.3.4.1 Leakage Inductor
        2. 2.3.4.2 Soft Switching Range
        3. 2.3.4.3 Effect of Inductance on Current
        4. 2.3.4.4 Phase Shift
        5. 2.3.4.5 Capacitor Selection
          1. 2.3.4.5.1 DC-Blocking Capacitors
        6. 2.3.4.6 Switching Frequency
        7. 2.3.4.7 Transformer Selection
        8. 2.3.4.8 SiC MOSFET Selection
      5. 2.3.5 Loss Analysis
        1. 2.3.5.1 SiC MOSFET and Diode Losses
        2. 2.3.5.2 Transformer Losses
        3. 2.3.5.3 Inductor Losses
        4. 2.3.5.4 Gate Driver Losses
        5. 2.3.5.5 Efficiency
        6. 2.3.5.6 Thermal Considerations
  9. 3Circuit Description
    1. 3.1 Power Stage
    2. 3.2 DC Voltage Sensing
      1. 3.2.1 Primary DC Voltage Sensing
      2. 3.2.2 Secondary DC Voltage Sensing
        1. 3.2.2.1 Secondary Side Battery Voltage Sensing
    3. 3.3 Current Sensing
    4. 3.4 Power Architecture
      1. 3.4.1 Auxiliary Power Supply
      2. 3.4.2 Gate Driver Bias Power Supply
      3. 3.4.3 Isolated Power Supply for Sense Circuits
    5. 3.5 Gate Driver Circuit
    6. 3.6 Additional Circuitry
    7. 3.7 Simulation
      1. 3.7.1 Setup
      2. 3.7.2 Running Simulations
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Required Hardware and Software
      1. 4.1.1 Hardware
      2. 4.1.2 Software
        1. 4.1.2.1 Getting Started With Software
        2. 4.1.2.2 Pin Configuration
        3. 4.1.2.3 PWM Configuration
        4. 4.1.2.4 High-Resolution Phase Shift Configuration
        5. 4.1.2.5 ADC Configuration
        6. 4.1.2.6 ISR Structure
    2. 4.2 Test Setup
    3. 4.3 PowerSUITE GUI
    4. 4.4 LABs
      1. 4.4.1 Lab 1
      2. 4.4.2 Lab 2
      3. 4.4.3 Lab 3
      4. 4.4.4 Lab 4
      5. 4.4.5 Lab 5
      6. 4.4.6 Lab 6
      7. 4.4.7 Lab 7
    5. 4.5 Test Results
      1. 4.5.1 Closed-Loop Performance
  11. 5Design Files
    1. 5.1 Schematics
    2. 5.2 Bill of Materials
    3. 5.3 Altium Project
    4. 5.4 Gerber Files
    5. 5.5 Assembly Drawings
  12. 6Related Documentation
    1. 6.1 Trademarks
  13. 7Terminology
  14. 8About the Author
  15. 9Revision History

2.3.5.4 Gate Driver Losses

The power loss in the gate driver circuit includes the losses in the UCC21530 and losses in the peripheral circuitry like the gate resistors. The power losses consist of the static power loss, which includes quiescent power loss on the driver as well as driver self-power consumption when operating with a certain switching frequency. Values of the quiescent current flowing into the Vcc pin (IVCCQ) and VDD pin (IVDDQ) are extracted from the data sheet.

Equation 29. P Q = ( V CC × I VCCQ ) + ( V DD × I VDDQ ) = ( 3 . 3 V × 3 mA ) + ( 15 V × 4 mA ) = 70 mW

By substituting the values from the data sheet in Equation 29, the result is PQ losses of the gate driver around 70 mW. The other component of gate driver loss is the switching operation loss. Which result in a total of 560 mW for eight gate drivers.

Equation 30. P s w = 2 × V D D - V EE × Q G × F s = 0 . 2 W

By substituting the value of VDD = 15 V, VEE = –4 V, FSW = 100 kHz, QG = 53 nC in Equation 32, the switching loss comes to 0.2 W per FET on primary.. The gate charge for C3M0075120K (primary side MOSFET) is extracted from the data sheet. Similarly, for the secondary side, the switching losses are calculated to be approximately 0.33 W. Gate charge, QG, for the C3M0030090K MOSFET is 87 nC and is obtained from the data sheet. Also during turn on and turn off of the MOSFETs, losses occur in the gate resistors. The turn on and turn off gate resistors are 2 Ω . These resistors are chosen to dampen out the oscillations at the gate. The gate driver IC can sink and source 10-A peak current during the switching process. Taking an average value of this current pulse over a switching cycle, the turn on and turn off losses occurring in the gate resistors is given by Equation 31.

Equation 31. P cond = Q G × ( V DD - V EE ) × F s 2 × ( R on R Gin + R off R Gin ) = 18 mW

This value comes to 18 mW for each switch on primary side and 30 mW per switch on secondary side, summing up to 192 mW in total. Thus, the total losses occurring in all gate drivers is approximately 3 W.