A lighting surge test between ACL and ACN was performed on this design. Figure 3-14 shows the 3-kV line to neutral surge voltage waveform when EUT is not connected.

Figure 3-14 Surge Voltage Waveform

With this surge waveform, the input current and the PFC choke current which is same with the current flow through GaN FET was tested. The result shows the surge current is fully bypassed by the inrush diodes clearly, and no risk to GaN FET (see Figure 3-15).

Figure 3-15 GaN FET, Choke Current in Surge Test

The surge current flow through MOSFET is a threat. As the test waveform in Figure 3-16 shows, the current under 3-kV surge exceeded the maximum peak current specification of the MOSFET.

Figure 3-16 Surge Current Through MOSFET

Experiments show that the power stage is survived at the ±3-kV surge, but the MOSFET leg is broken at the –4-kV surge. Figure 3-17 and Figure 3-18 illustrate the surge waveforms under ±3-kV, respectively.

Figure 3-17 Surge Test at +3 kV, 90 Degrees

Figure 3-18 Surge Test at –3 kV, 90 Degrees