TIDUF49 February 2024
Table 1-1, Table 1-2, and Table 1-3 show the key parameters of the design.
PARAMETER | CONNECTOR | SPECIFICATION | CONDITION | DETAILS |
---|---|---|---|---|
VPoDL | J1 | PoDL voltage on the cable at PSE | — | 12V–48V |
IPoDL | J1 | Maximal PoDL current on the cable | — | 1500mA |
Bitrate | J1 | Communication speed over SPE | — | 1000MBit/s |
BER | J1 | Bit error rate (BER) | Cable length = 15m VPoDL= 48V IPoDL= 1500mA |
< 10–9errors/bit |
PARAMETER | CONNECTOR | SPECIFICATION | CONDITION | DETAILS |
---|---|---|---|---|
Vext_IN | J14 | External PoDL input voltage | — | 48V max. |
Iext_IN | J14 | External PoDL input current | — | 1500mA max. |
PARAMETER | CONNECTOR | SPECIFICATION | CONDITION | DETAILS |
---|---|---|---|---|
Vext_OUT | J14 | Output voltage for external devices | — | 12V |
Iext_OUT | J14 | Output current for external devices | — | 1.75A max. |