ADC12D1620QML-SP

ACTIVO

Protección contra la radiación garantizada (RHA), QMLV, 300 krad, 12 bits, ADC 1.6 GSPS doble o ADC

Detalles del producto

Sample rate (max) (Msps) 1600, 3200 Resolution (Bits) 12 Number of input channels 1, 2 Interface type Parallel LVDS Analog input BW (MHz) 2400 Features Ultra High Speed Rating Space Peak-to-peak input voltage range (V) 0.8 Power consumption (typ) (mW) 3880 Architecture Folding Interpolating SNR (dB) 59.8 ENOB (bit) 9.5 SFDR (dB) 67.4 Operating temperature range (°C) -55 to 125 Input buffer Yes Radiation, TID (typ) (krad) 300 Radiation, SEL (MeV·cm2/mg) 120
Sample rate (max) (Msps) 1600, 3200 Resolution (Bits) 12 Number of input channels 1, 2 Interface type Parallel LVDS Analog input BW (MHz) 2400 Features Ultra High Speed Rating Space Peak-to-peak input voltage range (V) 0.8 Power consumption (typ) (mW) 3880 Architecture Folding Interpolating SNR (dB) 59.8 ENOB (bit) 9.5 SFDR (dB) 67.4 Operating temperature range (°C) -55 to 125 Input buffer Yes Radiation, TID (typ) (krad) 300 Radiation, SEL (MeV·cm2/mg) 120
CCGA (NAA) 376 780.6436 mm² 27.94 x 27.94 CLGA (FVA) 256 780.6436 mm² 27.94 x 27.94
  • Total ionizing dose (TID) to 300 krad(Si)
  • Single event functional interrupt (SEFI) tested
  • Single event latch-up (SEL) > 120 MeV-cm2/mg
  • Cold sparing capable
  • Wide temperature range –55°C to +125°C
  • Power consumption = 3.8 W or 2.7 W (1600- or 800-MHz clock)
  • 3-dB Input bandwidth = 3 GHz
  • Low-sampling power-saving mode (LSPSM) reduces power consumption and improves performance for fCLK ≤ 800 MHz
  • Auto-sync function for multi-chip systems
  • Time stamp feature to capture external trigger
  • Test patterns at output for system debug
  • 1:1 Non-demuxed or 1:2 or 1:4 parallel demuxed LVDS outputs
  • Single 1.9-V power supply
  • Total ionizing dose (TID) to 300 krad(Si)
  • Single event functional interrupt (SEFI) tested
  • Single event latch-up (SEL) > 120 MeV-cm2/mg
  • Cold sparing capable
  • Wide temperature range –55°C to +125°C
  • Power consumption = 3.8 W or 2.7 W (1600- or 800-MHz clock)
  • 3-dB Input bandwidth = 3 GHz
  • Low-sampling power-saving mode (LSPSM) reduces power consumption and improves performance for fCLK ≤ 800 MHz
  • Auto-sync function for multi-chip systems
  • Time stamp feature to capture external trigger
  • Test patterns at output for system debug
  • 1:1 Non-demuxed or 1:2 or 1:4 parallel demuxed LVDS outputs
  • Single 1.9-V power supply

The ADC12D1620QML uses a package redesign to achieve better ENOB, SNR, and X-talk compared to the ADC12D1600QML. As is its predecessor, the ADC12D1620QML is a low-power, high-performance CMOS analog-to-digital converter (ADC) that digitizes signals at a 12-bit resolution at sampling rates up to 3.2 GSPS in an interleaved mode. It can also be used as a dual-channel ADC for sampling rates up to 1.6 GSPS. For sampling rates below 800 MHz, there is a low-sampling power-saving mode (LSPSM) that reduces power consumption to less than 1.4 W per channel (typical). The ADC can support conversion rates as low as 200 MSPS.

The ADC12D1620QML uses a package redesign to achieve better ENOB, SNR, and X-talk compared to the ADC12D1600QML. As is its predecessor, the ADC12D1620QML is a low-power, high-performance CMOS analog-to-digital converter (ADC) that digitizes signals at a 12-bit resolution at sampling rates up to 3.2 GSPS in an interleaved mode. It can also be used as a dual-channel ADC for sampling rates up to 1.6 GSPS. For sampling rates below 800 MHz, there is a low-sampling power-saving mode (LSPSM) that reduces power consumption to less than 1.4 W per channel (typical). The ADC can support conversion rates as low as 200 MSPS.

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Documentación técnica

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Tipo Título Fecha
* Data sheet ADC12D1620QML-SP 12-Bit, Single Or Dual, 3200- or 1600-MSPS RF Sampling Analog-to-Digital Converter (ADC) datasheet (Rev. A) PDF | HTML 12 oct 2021
* SMD ADC12D1620QML-SP SMD ADC12D1620QML-SP SMD 5962-12205 22 oct 2020
* Radiation & reliability report ADC12D1600QML-SP/ADC12D1620QML-SP Single-Event Effects (SEE) Radiation Report 27 jul 2020
* Radiation & reliability report ADC12D1600CCMLS TID Report 17 ene 2013
* Radiation & reliability report Analysis of Low Dose Rate Effects on Parasitic Bipolar Structures in CMOS Proces 04 may 2012
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 31 ago 2023
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 17 nov 2022
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19 oct 2022
Selection guide TI Space Products (Rev. I) 03 mar 2022
Application brief Understanding Op Amp Noise in Audio Circuits PDF | HTML 14 jun 2021
User guide TSW12D1620EVM-CVAL User's Guide (Rev. A) 29 ene 2019
User guide ADC1xD1x00CVAL Board User’s Guide 09 jun 2017

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

TSW12D1620EVM-CVAL — Módulo de evaluación de receptor de banda ancha de calidad espacial ADC12D1620QML-SP

The TSW12D1620EVM-CVAL is a 1.5-GHz wideband receiver evaluation module (EVM) that includes ceramic engineering models of the amplifier, analog-to-digital converter (ADC), clocking, temperature sensor, microcontroller, and power solution. The board is best suited for (...)

Guía del usuario: PDF
Firmware

SBAC235 MSP430FR5969 Firmware

lock = Requiere aprobación de exportación (1 minuto)
Productos y hardware compatibles

Productos y hardware compatibles

Productos
Sensores de temperatura digitales
TMP461-SP Sensor de temperatura local y remoto de alta precisión con dureza garantizada por radiación (RHA)
Microcontroladores MSP430
MSP430FR5969 MCU de 16 MHz con 64 KB FRAM, 2 KB SRAM, AES, 12 bit ADC, comparador, DMA, UART/SPI/I2C, temporizado MSP430FR5969-SP Microcontrolador de señal mixta reforzado contra la radiación
ADC de alta velocidad (≥ 10 MSPS)
ADC12D1620QML-SP Protección contra la radiación garantizada (RHA), QMLV, 300 krad, 12 bits, ADC 1.6 GSPS doble o ADC
Desarrollo de hardware
Placa de evaluación
TSW12D1620EVM-CVAL Módulo de evaluación de receptor de banda ancha de calidad espacial ADC12D1620QML-SP
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Diseños de referencia

TIDA-070004 — Diseño de referencia de grado espacial con sensor integrado de temperatura de salida digital

This reference design illustrates the fact that several spacecraft projects provide a system health status telemetry that ground personnel monitor in real time. This reference design shows an example using a digital output temperature sensor to acquire temperature data on a sub-system using a (...)
Design guide: PDF
Esquema: PDF
Paquete Pasadores Descargar
CCGA (NAA) 376 Ver opciones
CLGA (FVA) 256 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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