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Circuitos integrados LVDS, M-LVDS y PECL

DS90LT012A

ACTIVO

Receptor de línea diferencial LVDS de 3 V con CMOS único

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DS90LT012A

ACTIVO
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Detalles del producto

Function Receiver Protocols BLVDS, LVDS, LVPECL Number of transmitters 0 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal BLVDS, LVDS, LVPECL Output signal LVCMOS, LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols BLVDS, LVDS, LVPECL Number of transmitters 0 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal BLVDS, LVDS, LVPECL Output signal LVCMOS, LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Compatible with ANSI TIA/EIA-644-A Standard
  • >400 Mbps (200 MHz) switching rates
  • 100 ps differential skew (typical)
  • 3.5 ns maximum propagation delay
  • Integrated line termination resistor (102Ω typical)
  • Single 3.3V power supply design (2.7V to 3.6V range)
  • Power down high impedance on LVDS inputs
  • Accepts small swing (350 mV typical) differential signal levels
  • LVDS receiver inputs accept LVDS/BLVDS/LVPECL inputs
  • Supports open, short and terminated input fail-safe
  • Pinout simplifies PCB layout
  • Low Power Dissipation (10mW typical@ 3.3V static)
  • SOT-23 5-lead package
  • Leadless WSON-8 package (3x3 mm body size)
  • Electrically similar to the DS90LV018A
  • Fabricated with advanced CMOS process technology
  • Industrial temperature operating range (−40°C to +85°C)

All trademarks are the property of their respective owners.

  • Compatible with ANSI TIA/EIA-644-A Standard
  • >400 Mbps (200 MHz) switching rates
  • 100 ps differential skew (typical)
  • 3.5 ns maximum propagation delay
  • Integrated line termination resistor (102Ω typical)
  • Single 3.3V power supply design (2.7V to 3.6V range)
  • Power down high impedance on LVDS inputs
  • Accepts small swing (350 mV typical) differential signal levels
  • LVDS receiver inputs accept LVDS/BLVDS/LVPECL inputs
  • Supports open, short and terminated input fail-safe
  • Pinout simplifies PCB layout
  • Low Power Dissipation (10mW typical@ 3.3V static)
  • SOT-23 5-lead package
  • Leadless WSON-8 package (3x3 mm body size)
  • Electrically similar to the DS90LV018A
  • Fabricated with advanced CMOS process technology
  • Industrial temperature operating range (−40°C to +85°C)

All trademarks are the property of their respective owners.

The DS90LV012A and DS90LT012A are single CMOS differential line receivers designed for applications requiring ultra low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Swing (LVDS) technology

The DS90LV012A and DS90LT012A accept low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receivers also support open, shorted, and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV012A has a pinout designed for easy PCB layout. The DS90LT012A includes an input line termination resistor for point-to-point applications.

The DS90LV012A and DS90LT012A, and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed interface applications.

The DS90LV012A and DS90LT012A are single CMOS differential line receivers designed for applications requiring ultra low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Swing (LVDS) technology

The DS90LV012A and DS90LT012A accept low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receivers also support open, shorted, and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV012A has a pinout designed for easy PCB layout. The DS90LT012A includes an input line termination resistor for point-to-point applications.

The DS90LV012A and DS90LT012A, and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed interface applications.
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Documentación técnica

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Tipo Título Fecha
* Data sheet DS90LV012A / DS90LT012A 3V LVDS Single CMOS Differential Line Receiver datasheet (Rev. D) 17 abr 2013
Application note Applications of Low-Voltage Differential Signaling (LVDS) in LED Walls 29 oct 2020
Application note Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 29 jun 2019
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 ago 2018
Application brief How to Terminate LVDS Connections with DC and AC Coupling 16 may 2018
Application note AN-1821 CPRI Repeater System (Rev. A) 26 abr 2013
White paper Eye Opening Enhancements extend the reach of high-speed Interfaces 01 oct 2002
Application note An Overview of LVDS Technology 05 oct 1998

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

DS90LV047-48AEVM — Módulo de evaluación DS90LV047-48AEVM

The DS90LV047-48AEVM is an evaluation module (EVM) designed for performance and functional evaluation of Texas Instruments' DS90LV047A 3-V LVDS quad CMOS differential line driver and DS90LV048A 3-V LVDS CMOS differential line receiver. With this kit, users can quickly evaluate the output (...)
Guía del usuario: PDF
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Modelo de simulación

DS90LT012A IBIS Model

SNLM044.ZIP (11 KB) - IBIS Model
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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
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SOT-23 (DBV) 5 Ver opciones
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Pedidos y calidad

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  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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