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PCI2250

ACTIVO

Puente PCI a PCI de 32 bits y 33 MHz, compatible con intercambio en caliente de PCI, 4 maestros

Detalles del producto

Type Bridge Protocols PCIe Applications PCIe Number of channels 3 Speed (max) (Gbps) 0.033 Supply voltage (V) 3.3, 5 Rating Catalog Operating temperature range (°C) 0 to 70
Type Bridge Protocols PCIe Applications PCIe Number of channels 3 Speed (max) (Gbps) 0.033 Supply voltage (V) 3.3, 5 Rating Catalog Operating temperature range (°C) 0 to 70
LQFP (PGF) 176 676 mm² 26 x 26 QFP (PCM) 160 973.44 mm² 31.2 x 31.2
  • Configurable for PCI Power Management Interface Specification Revision 1.0 or 1.1 support
  • Compact-PCI friendly silicon as defined in the Compact-PCI Hot Swap Specification
  • 3.3-V core logic with universal PCI interface compatible with 3.3-V and 5-V PCI signaling environments
  • Two 32-bit, 33-MHz PCI buses
  • Provides internal two-tier arbitration for up to four secondary bus masters and supports an external secondary bus arbiter
  • Burst data transfers with pipeline architecture to maximize data throughput in both directions
  • Provides programmable extension windows and port decode options
  • Independent read and write buffers for each direction
  • Provides five secondary PCI clock outputs
  • Predictable latency per PCI Local Bus Specification
  • Propagates bus locking
  • Secondary bus is driven low during reset
  • Provides VGA palette memory and I/O, and subtractive decoding options
  • Advanced submicron, low-power CMOS technology
  • Fully compliant with PCI-to-PCI Bridge Architecture Specification
  • Packaged in 160-pin QFP (PCM) and 176-pin thin QFP (PGF)
  • Configurable for PCI Power Management Interface Specification Revision 1.0 or 1.1 support
  • Compact-PCI friendly silicon as defined in the Compact-PCI Hot Swap Specification
  • 3.3-V core logic with universal PCI interface compatible with 3.3-V and 5-V PCI signaling environments
  • Two 32-bit, 33-MHz PCI buses
  • Provides internal two-tier arbitration for up to four secondary bus masters and supports an external secondary bus arbiter
  • Burst data transfers with pipeline architecture to maximize data throughput in both directions
  • Provides programmable extension windows and port decode options
  • Independent read and write buffers for each direction
  • Provides five secondary PCI clock outputs
  • Predictable latency per PCI Local Bus Specification
  • Propagates bus locking
  • Secondary bus is driven low during reset
  • Provides VGA palette memory and I/O, and subtractive decoding options
  • Advanced submicron, low-power CMOS technology
  • Fully compliant with PCI-to-PCI Bridge Architecture Specification
  • Packaged in 160-pin QFP (PCM) and 176-pin thin QFP (PGF)

The Texas Instruments PCI2250 PCI-to-PCI bridge provides a high performance connection path between two peripheral component interconnect (PCI) buses. Transactions occur between masters on one PCI bus and targets on another PCI bus, and the PCI2250 allows bridged transactions to occur concurrently on both buses. The bridge supports burst-mode transfers to maximize data throughput, and the two bus traffic paths through the bridge act independently.

The PCI2250 bridge is compliant with the PCI Local Bus Specification, and can be used to overcome the electrical loading limits of 10 devices per PCI bus and one PCI device per expansion slot by creating hierarchical buses. The PCI2250 provides two-tier internal arbitration for up to four secondary bus masters and may be implemented with an external secondary PCI bus arbiter.

The PCI2250 provides compact-PCI (CPCI) hot-swap extended capability, which makes it an ideal solution for multifunction compact-PCI cards and adapting single function cards to hot-swap compliance.

The PCI2250 bridge is compliant with the PCI-to-PCI Bridge Specification. It can be configured for positive decoding or subtractive decoding on the primary interface, and provides several additional decode options that make it an ideal bridge to custom PCI applications. Two extension windows are included, and the PCI2250 provides decoding of serial and parallel port addresses.

The PCI2250 is compliant with PCI Power Management Interface Specification Revisions 1.0 and 1.1. Also, the PCI2250 offers PCI CLKRUN bridging support for low-power mobile and docking applications. The PCI2250 has been designed to lead the industry in power conservation. An advanced CMOS process is utilized to achieve low system power consumption while operating at PCI clock rates up to 33 MHz.

The Texas Instruments PCI2250 PCI-to-PCI bridge provides a high performance connection path between two peripheral component interconnect (PCI) buses. Transactions occur between masters on one PCI bus and targets on another PCI bus, and the PCI2250 allows bridged transactions to occur concurrently on both buses. The bridge supports burst-mode transfers to maximize data throughput, and the two bus traffic paths through the bridge act independently.

The PCI2250 bridge is compliant with the PCI Local Bus Specification, and can be used to overcome the electrical loading limits of 10 devices per PCI bus and one PCI device per expansion slot by creating hierarchical buses. The PCI2250 provides two-tier internal arbitration for up to four secondary bus masters and may be implemented with an external secondary PCI bus arbiter.

The PCI2250 provides compact-PCI (CPCI) hot-swap extended capability, which makes it an ideal solution for multifunction compact-PCI cards and adapting single function cards to hot-swap compliance.

The PCI2250 bridge is compliant with the PCI-to-PCI Bridge Specification. It can be configured for positive decoding or subtractive decoding on the primary interface, and provides several additional decode options that make it an ideal bridge to custom PCI applications. Two extension windows are included, and the PCI2250 provides decoding of serial and parallel port addresses.

The PCI2250 is compliant with PCI Power Management Interface Specification Revisions 1.0 and 1.1. Also, the PCI2250 offers PCI CLKRUN bridging support for low-power mobile and docking applications. The PCI2250 has been designed to lead the industry in power conservation. An advanced CMOS process is utilized to achieve low system power consumption while operating at PCI clock rates up to 33 MHz.

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Documentación técnica

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Tipo Título Fecha
* Data sheet PCI-to-PCI Bridge datasheet 13 dic 1999
* Errata PCI2250 Data Sheet Errata (Rev. A) 06 feb 2007
User guide PCI2250 PCI-to-PCI Bridge Implementation Guide (Rev. A) 23 abr 2003
Application note Differences Between the Intel 21152 and the PCI2250 31 mar 2003
Application note Connecting ENUM Terminal to an External Open-Drain Buffer 13 abr 2000

Diseño y desarrollo

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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Paquete Pasadores Descargar
LQFP (PGF) 176 Ver opciones
QFP (PCM) 160 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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