These dual 4-bit D-type edge-triggered flip-flops feature 3-state outputs designed specifically as bus drivers. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The edge-triggered flip-flops enter data on the low-to-high
transition of the clock (CLK) input. The SN54ALS874B, SN74ALS874B,
and SN74AS874 have clear (
)
inputs and noninverting Q outputs. The SN74ALS876A and SN74AS876 have
preset (
) inputs and
inverting Q\ outputs; taking low
causes the four Q or Q\ outputs to go low independently of the clock.
The SN54ALS874B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS874B, SN74ALS876A, SN74AS874, and SN74AS876 devices are characterized for operation from 0°C to 70°C.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | Dual 4-Bit D-Type Edge-Triggered Flip-Flops datasheet (Rev. C) | 01 ene 1995 | |
| Application note | Power-Up Behavior of Clocked Devices (Rev. B) | PDF | HTML | 15 dic 2022 | |
| Selection guide | Logic Guide (Rev. AB) | 12 jun 2017 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 02 dic 2015 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 16 ene 2007 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 08 jul 2004 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 29 ago 2002 | ||
| Application note | Designing With Logic (Rev. C) | 01 jun 1997 | ||
| Application note | Advanced Schottky Load Management | 01 feb 1997 | ||
| Application note | Input and Output Characteristics of Digital Integrated Circuits | 01 oct 1996 | ||
| Application note | Live Insertion | 01 oct 1996 | ||
| Application note | Advanced Schottky (ALS and AS) Logic Families | 01 ago 1995 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
El módulo de evaluación 14-24-LOGIC-EVM (EVM) está diseñado para admitir cualquier dispositivo lógico que esté en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.
| Paquete | Pasadores | Descargar |
|---|---|---|
| SOIC (DW) | 24 | Ver opciones |
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