The SN74AXCH8T245 device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7 V, 0.8 V, and 0.9 V) and devices operating at industry standard voltage nodes (1.8 V, 2.5 V, 3.3 V) and vice versa.
The device operates by using two independent power-supply rails (VCCA and VCCB) . Data pins A1 through A8 are designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. Data pins B1 through B8 are designed to track VCCB, which accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH8T245 is compatible with a single-supply system.
The SN74AXCH8T245 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable (OE) input is used to disable the outputs so the buses are effectively isolated.
The SN74AXCH8T245 device is designed so the control pins (DIR and OE) are referenced to VCCA.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pull-up or pull-down resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on all A and B ports respectively, independent of the direction control or output enable.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
The VCC isolation feature ensures that if either VCC input supply is below 100 mV, all level shifter outputs are disabled and placed into a high-impedance state. To ensure the high-impedance state of the level shifter I/Os during power up or power down, OE should be tied to VCCA through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | SN74AXCH8T245 8-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation, Tri-State Outputs, and Bus-Hold Circuitry datasheet (Rev. A) | PDF | HTML | 07 ene 2019 |
| EVM User's guide | Generic AVC and LVC Direction Controlled Translation EVM (Rev. B) | 30 jul 2021 | ||
| Application note | Low Voltage Translation for SPI, UART, RGMII, JTAG Interfaces (Rev. B) | PDF | HTML | 29 mar 2021 | |
| Application note | Glitch free power sequencing with AXC level translators (Rev. A) | 20 sep 2018 | ||
| Application note | An Overview of Bus-Hold Circuit and the Applications (Rev. B) | 17 sep 2018 | ||
| User guide | SN74AXC8T245 Evaluation Module | 02 ago 2017 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
El módulo de evaluación 14-24-LOGIC-EVM (EVM) está diseñado para admitir cualquier dispositivo lógico que esté en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.
14-24-NL-LOGIC-EVM es un módulo de evaluación (EVM) flexible diseñado para admitir cualquier dispositivo lógico o de traducción que tenga un encapsulado BQA, BQB, RGY, RSV, RJW o RHL de 14 a 24 pines.
The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC (...)
| Paquete | Pasadores | Descargar |
|---|---|---|
| TSSOP (PW) | 24 | Ver opciones |
| VQFN (RHL) | 24 | Ver opciones |
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