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SN75C1406

ACTIVO

Receptores y controladores de baja potencia triples

Detalles del producto

Drivers per package 3 Receivers per package 3 Logic voltage (min) (V) 5 Data rate (max) (Mbps) 0.12 Main supply voltage (nom) (V) 5 ESD HBM (kV) 2 Rating Catalog Operating temperature range (°C) 0 to 70 Vout (typ) (V) 10.7
Drivers per package 3 Receivers per package 3 Logic voltage (min) (V) 5 Data rate (max) (Mbps) 0.12 Main supply voltage (nom) (V) 5 ESD HBM (kV) 2 Rating Catalog Operating temperature range (°C) 0 to 70 Vout (typ) (V) 10.7
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 SOIC (DW) 16 106.09 mm² 10.3 x 10.3 SOP (NS) 16 79.56 mm² 10.2 x 7.8
  • Meet or Exceed the Requirements of TIA/EIA-232-F and ITU Recommendation V.28
  • Very Low Power Consumption . . . 5 mW Typ
  • Wide Driver Supply Voltage Range . . . ±4.5 V to ±15 V
  • Driver Output Slew Rate Limited to 30 V/us Max
  • Receiver Input Hysteresis . . . 1000 mV Typ
  • Push-Pull Receiver Outputs
  • On-Chip Receiver 1-us Noise Filter
  • Functionally Interchangeable With Motorola MC145406 and Texas Instruments TL145406
  • Package Options Include Plastic Small-Outline (D, DW, NS) Packages and DIPs (N)

  • Meet or Exceed the Requirements of TIA/EIA-232-F and ITU Recommendation V.28
  • Very Low Power Consumption . . . 5 mW Typ
  • Wide Driver Supply Voltage Range . . . ±4.5 V to ±15 V
  • Driver Output Slew Rate Limited to 30 V/us Max
  • Receiver Input Hysteresis . . . 1000 mV Typ
  • Push-Pull Receiver Outputs
  • On-Chip Receiver 1-us Noise Filter
  • Functionally Interchangeable With Motorola MC145406 and Texas Instruments TL145406
  • Package Options Include Plastic Small-Outline (D, DW, NS) Packages and DIPs (N)

The SN65C1406 and SN75C1406 are low-power BiMOS devices containing three independent drivers and receivers that are used to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). These devices are designed to conform to TIA/EIA-232-F. The drivers and receivers of the SN65C1406 and SN75C1406 are similar to those of the SN75C188 quadruple driver and SN75C189A quadruple receiver, respectively. The drivers have a controlled output slew rate that is limited to a maximum of 30 V/us, and the receivers have filters that reject input noise pulses shorter than 1 us. Both these features eliminate the need for external components.

The SN65C1406 and SN75C1406 are designed using low-power techniques in a BiMOS technology. In most applications, the receivers contained in these devices interface to single inputs of peripheral devices such as ACEs, UARTs, or microprocessors. By using sampling, such peripheral devices are usually insensitive to the transition times of the input signals. If this is not the case, or for other uses, it is recommended that the SN65C1406 and SN75C1406 receiver outputs be buffered by single Schmitt input gates or single gates of the HCMOS, ALS, or 74F logic families.

The SN65C1406 is characterized for operation from \x9640°C to 85°C. The SN75C1406 is characterized for operation from 0°C to 70°C.

The SN65C1406 and SN75C1406 are low-power BiMOS devices containing three independent drivers and receivers that are used to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). These devices are designed to conform to TIA/EIA-232-F. The drivers and receivers of the SN65C1406 and SN75C1406 are similar to those of the SN75C188 quadruple driver and SN75C189A quadruple receiver, respectively. The drivers have a controlled output slew rate that is limited to a maximum of 30 V/us, and the receivers have filters that reject input noise pulses shorter than 1 us. Both these features eliminate the need for external components.

The SN65C1406 and SN75C1406 are designed using low-power techniques in a BiMOS technology. In most applications, the receivers contained in these devices interface to single inputs of peripheral devices such as ACEs, UARTs, or microprocessors. By using sampling, such peripheral devices are usually insensitive to the transition times of the input signals. If this is not the case, or for other uses, it is recommended that the SN65C1406 and SN75C1406 receiver outputs be buffered by single Schmitt input gates or single gates of the HCMOS, ALS, or 74F logic families.

The SN65C1406 is characterized for operation from \x9640°C to 85°C. The SN75C1406 is characterized for operation from 0°C to 70°C.

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Documentación técnica

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Tipo Título Fecha
* Data sheet Triple Low-Power Drivers/Receivers datasheet (Rev. E) 12 oct 2001

Diseño y desarrollo

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Herramienta de simulación

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Guía del usuario: PDF
Paquete Pasadores Descargar
PDIP (N) 16 Ver opciones
SOIC (D) 16 Ver opciones
SOIC (DW) 16 Ver opciones
SOP (NS) 16 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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