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TPS1100

ACTIVO

MOSFET de modo de mejora de canal P único

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Detalles del producto

Rating Catalog Operating temperature range (°C) to
Rating Catalog Operating temperature range (°C) to
SOIC (D) 8 29.4 mm² 4.9 x 6 TSSOP (PW) 8 19.2 mm² 3 x 6.4
  • Low rDS(on) . . . 0.18 Typ at VGS = -10 V
  • 3 V Compatible
  • Requires No External VCC
  • TTL and CMOS Compatible Inputs
  • VGS(th) = -1.5 V Max
  • Available in Ultrathin TSSOP Package (PW)
  • ESD Protection Up to 2 kV Per MIL-STD-883C, Method 3015

LinBICMOS is a trademark of Texas Instruments Incorporated

  • Low rDS(on) . . . 0.18 Typ at VGS = -10 V
  • 3 V Compatible
  • Requires No External VCC
  • TTL and CMOS Compatible Inputs
  • VGS(th) = -1.5 V Max
  • Available in Ultrathin TSSOP Package (PW)
  • ESD Protection Up to 2 kV Per MIL-STD-883C, Method 3015

LinBICMOS is a trademark of Texas Instruments Incorporated

The TPS1100 is a single P-channel enhancement-mode MOSFET. The device has been optimized for 3-V or 5-V power distribution in battery-powered systems by means of Texas Instruments LinBiCMOSTM process. With a maximum VGS(th) of -1.5 V and an IDSS of only 0.5 uA, the TPS1100 is the ideal high-side switch for low-voltage, portable battery-management systems where maximizing battery life is a primary concern. The low rDS(on) and excellent ac characteristics (rise time 10 ns typical) make the TPS1100 the logical choice for low-voltage switching applications such as power switches for pulse-width-modulated (PWM) controllers or motor/bridge drivers.

The ultrathin thin shrink small-outline package or TSSOP (PW) version with its smaller footprint and reduction in height fits in places where other P-channel MOSFETs cannot. The size advantage is especially important where board real estate is at a premium and height restrictions do not allow for a small-outline integrated circuit (SOIC) package.

Such applications include notebook computers, personal digital assistants (PDAs), cellular telephones, and PCMCIA cards. For existing designs, the D-packaged version has a pinout common with other p-channel MOSFETs in SOIC packages.

Caution. This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C, Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated voltages to these high-impedance circuits.

The TPS1100 is a single P-channel enhancement-mode MOSFET. The device has been optimized for 3-V or 5-V power distribution in battery-powered systems by means of Texas Instruments LinBiCMOSTM process. With a maximum VGS(th) of -1.5 V and an IDSS of only 0.5 uA, the TPS1100 is the ideal high-side switch for low-voltage, portable battery-management systems where maximizing battery life is a primary concern. The low rDS(on) and excellent ac characteristics (rise time 10 ns typical) make the TPS1100 the logical choice for low-voltage switching applications such as power switches for pulse-width-modulated (PWM) controllers or motor/bridge drivers.

The ultrathin thin shrink small-outline package or TSSOP (PW) version with its smaller footprint and reduction in height fits in places where other P-channel MOSFETs cannot. The size advantage is especially important where board real estate is at a premium and height restrictions do not allow for a small-outline integrated circuit (SOIC) package.

Such applications include notebook computers, personal digital assistants (PDAs), cellular telephones, and PCMCIA cards. For existing designs, the D-packaged version has a pinout common with other p-channel MOSFETs in SOIC packages.

Caution. This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C, Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated voltages to these high-impedance circuits.

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Documentación técnica

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Tipo Título Fecha
* Data sheet Single P-Channel Enhancement-Mode MOSFETs datasheet (Rev. C) 01 ago 1995

Diseño y desarrollo

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Paquete Pasadores Descargar
SOIC (D) 8 Ver opciones
TSSOP (PW) 8 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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