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Controladores de compuertas
Drivers de compuerta aislados

UCC21222-Q1

ACTIVO

Controlador de puerta aislada de doble canal (4 A/6 A) y 3.0 kVrms, con pin de desactivación, tiempo

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NUEVO UCC21330-Q1 ACTIVO Automotive, 3kVRMS 4A/6A two-channel gate driver with enable logic and programmable deadtime Improved CMTI, faster VDD startup

UCC21222-Q1

ACTIVO
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Detalles del producto

Number of channels 2 Isolation rating Basic Withstand isolation voltage (VISO) (Vrms) 3000 Working isolation voltage (VIOWM) (Vrms) 990 Transient isolation voltage (VIOTM) (VPK) 4242 Power switch IGBT, MOSFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 TI functional safety category Functional Safety-Capable Propagation delay time (µs) 0.025 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Automotive Bootstrap supply voltage (max) (V) 990 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 8
Number of channels 2 Isolation rating Basic Withstand isolation voltage (VISO) (Vrms) 3000 Working isolation voltage (VIOWM) (Vrms) 990 Transient isolation voltage (VIOTM) (VPK) 4242 Power switch IGBT, MOSFET Peak output current (A) 6 Features Disable, Programmable dead time Output VCC/VDD (max) (V) 18 Output VCC/VDD (min) (V) 9.2 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 TI functional safety category Functional Safety-Capable Propagation delay time (µs) 0.025 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 125 Rating Automotive Bootstrap supply voltage (max) (V) 990 Rise time (ns) 5 Fall time (ns) 6 Undervoltage lockout (typ) (V) 8
SOIC (D) 16 59.4 mm² 9.9 x 6
  • Universal: dual low-side, dual high-side or half-bridge driver
  • AEC Q100 qualified with:
    • Device temperature grade 1
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C4B
  • Junction temperature range –40°C to 150°C
  • 4A peak source, 6A peak sink output
  • Common-mode transient immunity (CMTI) greater than 125V/ns
  • Up to 25V VDD output drive supply
    • 8V VDD UVLO
  • Switching parameters:
    • 33ns typical propagation delay
    • 5ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • UVLO protection for all power supplies
  • Fast disable for power sequencing
  • Universal: dual low-side, dual high-side or half-bridge driver
  • AEC Q100 qualified with:
    • Device temperature grade 1
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C4B
  • Junction temperature range –40°C to 150°C
  • 4A peak source, 6A peak sink output
  • Common-mode transient immunity (CMTI) greater than 125V/ns
  • Up to 25V VDD output drive supply
    • 8V VDD UVLO
  • Switching parameters:
    • 33ns typical propagation delay
    • 5ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • UVLO protection for all power supplies
  • Fast disable for power sequencing

The UCC21222-Q1 device is an isolated dual channel gate driver with programmable dead time and a wide temperature range. This device exhibits consistent performance and robustness under extreme temperature conditions. It is designed with 4A peak-source and 6A peak-sink current to drive power MOSFET, IGBT, and GaN transistors.

The UCC21222-Q1 device can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. A 5ns delay matching performance allows two outputs to be paralleled, doubling the drive strength for heavy load conditions without risk of internal shoot-through.

The input side is isolated from the two output drivers by a 3.0kVRMS isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI).

Resistor programmable dead time gives the capability to adjust dead time for system constraints to improve efficiency and prevent output overlap. Other protection features include a disable feature to shut down both outputs simultaneously when DIS is set high, an integrated deglitch filter that rejects input transients shorter than 5ns, and negative voltage handling for up to –2V spikes for 200ns on input and output pins. All supplies have UVLO protection.

The UCC21222-Q1 device is an isolated dual channel gate driver with programmable dead time and a wide temperature range. This device exhibits consistent performance and robustness under extreme temperature conditions. It is designed with 4A peak-source and 6A peak-sink current to drive power MOSFET, IGBT, and GaN transistors.

The UCC21222-Q1 device can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. A 5ns delay matching performance allows two outputs to be paralleled, doubling the drive strength for heavy load conditions without risk of internal shoot-through.

The input side is isolated from the two output drivers by a 3.0kVRMS isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI).

Resistor programmable dead time gives the capability to adjust dead time for system constraints to improve efficiency and prevent output overlap. Other protection features include a disable feature to shut down both outputs simultaneously when DIS is set high, an integrated deglitch filter that rejects input transients shorter than 5ns, and negative voltage handling for up to –2V spikes for 200ns on input and output pins. All supplies have UVLO protection.
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* Data sheet UCC21222-Q1 Automotive 4A, 6A, 3kVRMS Isolated Dual-Channel Gate Driver with Dead Time datasheet (Rev. B) PDF | HTML 02 abr 2024
Certificate VDE Certificate for Basic Isolation for DIN EN IEC 60747-17 (Rev. W) 31 ene 2024
Application note Impact of Narrow Pulse Widths in Gate Driver Circuits (Rev. A) PDF | HTML 25 ene 2024
White paper Addressing High-Volt Design Challenges w/ Reliable and Affordable Isolation Tech (Rev. C) PDF | HTML 26 sep 2023
Certificate UCC21220 CQC Certificate of Product Certification 16 ago 2023
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 16 dic 2021
Application brief External Gate Resistor Selection Guide (Rev. A) 28 feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 feb 2020
Certificate UL Certification E181974 Vol 4. Sec 9 (Rev. A) 22 jul 2019
User guide Gate Drive Voltage vs. Efficiency 25 abr 2019
White paper Driving the future of HEV/EV with high-voltage solutions (Rev. B) 16 may 2018
Application note Isolation Glossary (Rev. A) 19 sep 2017
Technical article Are you on-board? Demystifying EV charging systems PDF | HTML 31 jul 2017

Diseño y desarrollo

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Placa de evaluación

UCC21220EVM-009 — Módulo de evaluación UCC21220 de controlador de puerta aislada de doble canal (4 A y 6 A) y 3.0 kVrm

UCC21220EVM-009 is designed for evaluating UCC21220, which is a 3.0-kVRMS Isolated Dual-Channel Gate Driver with 4.0-A source and 6.0-A sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC component selection (...)
Guía del usuario: PDF
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Modelo de simulación

UCC21222-Q1 PSpice Transient Model

SLUM622.ZIP (57 KB) - PSpice Model
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Modelo de simulación

UCC21222-Q1 Unencrypted PSpice Transient Model

SLUM623.ZIP (3 KB) - PSpice Model
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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Diseños de referencia

PMP22650 — Diseño de referencia de cargador de a bordo bidireccional de 6,6 kW basado en GaN

El diseño de referencia PMP22650 es un cargador integrado bidireccional de 6.6 kW. El diseño emplea un PFC tótem bifásico y un convertidor CLLLC de puente completo con rectificación síncrona. El CLLLC utiliza la modulación de frecuencia y de fase para regular la salida en todo el rango de (...)
Test report: PDF
Esquema: PDF
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SOIC (D) 16 Ver opciones
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Pedidos y calidad

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  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
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  • Lugar de fabricación
  • Lugar de ensamblaje

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