74ACT16623
- Members of the Texas Instruments WidebusTM Family
- Inputs are TTL-Voltage Compatible
- Flow-Through Architecture Optimizes PCB Layout
- Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
- EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
- Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
The 'ACT16623 are 16-bit transceivers designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the output-enable ( and OEAB) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated.
The dual-enable configuration gives the bus transceiver the capability to store data by simultaneously enabling and OEAB. Each output reinforces its input in this transceiver configuration. When both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, the bus lines remain at their last states.
The 74ACT16623 is packaged in TI's shrink small-outline package, which provides twice the functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16623 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16623 is characterized for operation from -40°C to 85°C.
기술 문서
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | 16-Bit Bus Tranceivers With 3-State Outputs datasheet (Rev. A) | 1996/04/01 | |
Application note | Implications of Slow or Floating CMOS Inputs (Rev. E) | 2021/07/26 | ||
Selection guide | Logic Guide (Rev. AB) | 2017/06/12 | ||
Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015/12/02 | ||
User guide | LOGIC Pocket Data Book (Rev. B) | 2007/01/16 | ||
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004/07/08 | ||
Application note | Selecting the Right Level Translation Solution (Rev. A) | 2004/06/22 | ||
Application note | TI IBIS File Creation, Validation, and Distribution Processes | 2002/08/29 | ||
Application note | CMOS Power Consumption and CPD Calculation (Rev. B) | 1997/06/01 | ||
Application note | Designing With Logic (Rev. C) | 1997/06/01 | ||
Application note | Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc | 1996/04/01 |
설계 및 개발
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주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치