CD54AC541
- Buffered inputs
- Typical propagation delay:
4.5 ns @ VCC = 5 V, TA = 25°C, CL = 50 pF - Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015
- SCR-Latchup-resistant CMOS process and circuit design
- Speed of bipolar FAST®/AS/S with significantly reduced power consumption
- Balanced propagation delays
- AC types feature 1.5-V to 5.5-V operation and balanced noise immunity at 30% of the supply
- ± 24-mA output drive current
-Fanout to 15 FAST® ICs
-Drives 50-ohm transmission lines - Characterized for operation from –40° to 85°C
FAST is a Registered Trademark of Fairchild Semiconductor Corp.
The CD54/74AC540, –541, and CD54/74ACT540, –541 octal buffer/line drivers use the RCA ADVANCED CMOS technology. The CD54/74AC/ACT540 are inverting 3-state buffers having two active-LOW output enables. The CD54/74AC/ACT541 are non-inverting 3-state buffers having two active-LOW output enables.
The CD74AC540, –541, and CD74ACT540, –541 are supplied in 20-lead dual-in-line plastic packages (E suffix) and in 20-lead dual-in-line small-outline plastic packages (M suffix). Both package types are operable over the following temperature ranges: Industrial (–40 to +85°C) and Extended Industrial/Military (–55 to +125°C).
The CD54AC540, –541, and CD54ACT540, –541, available in chip form (H suffix), are operable over the –55 to +125°C temperature range.
기술 문서
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | Octal Buffer/Line Drivers, 3-State datasheet (Rev. A) | 1999/11/16 | |
| Application note | Implications of Slow or Floating CMOS Inputs (Rev. E) | 2021/07/26 | ||
| Selection guide | Logic Guide (Rev. AB) | 2017/06/12 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015/12/02 | ||
| More literature | HiRel Unitrode Power Management Brochure | 2009/07/07 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 2007/01/16 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004/07/08 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 2002/08/29 | ||
| Application note | CMOS Power Consumption and CPD Calculation (Rev. B) | 1997/06/01 | ||
| Application note | Designing With Logic (Rev. C) | 1997/06/01 | ||
| Application note | Input and Output Characteristics of Digital Integrated Circuits | 1996/10/01 | ||
| Application note | Live Insertion | 1996/10/01 | ||
| Application note | Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc | 1996/04/01 |
설계 및 개발
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주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치