SN74AHCT1G126

Name: SN74AHCT1G126
Brand: TI
SKU: SN74AHCT1G126
Price: 0.133 USD

활성

TTL 호환 CMOS 입력 및 3상 출력을 지원하는 단일 4.5V~5.5V 버퍼

지금 주문

데이터시트

document-pdfAcrobat SN74AHCT1G126 Single Bus Buffer Gate With 3-State Output datasheet (Rev. L) (영어) PDF | HTML

SN74AHCT1G126

활성

데이터시트

지금 주문

제품 상세 정보

Technology family

AHCT

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Number of channels

IOL (max) (mA)

Supply current (max) (µA)

IOH (max) (mA)

-8

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Technology family

AHCT

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Number of channels

IOL (max) (mA)

Supply current (max) (µA)

IOH (max) (mA)

-8

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

SOT-23 (DBV)

8.12 mm² 2.9 x 2.8

SOT-SC70 (DCK)

4.2 mm² 2 x 2.1

Operating range of 4.5V to 5.5V
Max tpd of 6ns at 5V
Low power consumption, 10µA max ICC
±8mA output drive at 5V
Inputs are TTL-voltage compatible
Latch-up performance exceeds 250mA per JESD 17

Operating range of 4.5V to 5.5V
Max tpd of 6ns at 5V
Low power consumption, 10µA max ICC
±8mA output drive at 5V
Inputs are TTL-voltage compatible
Latch-up performance exceeds 250mA per JESD 17

The SN74AHCT1G126 device is a single bus buffer gate/line driver with 3-state output. The output is disabled when the output-enable (OE) input is low. When OE is high, true data is passed from the A input to the Y output.

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관심 가지실만한 유사 제품

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대안 비교

비교 대상 장치와 동일한 기능을 지원하는 핀 대 핀

SN74AHCT1G125

활성

TTL 호환 CMOS 입력 및 3상 출력을 지원하는 단일 4.5V~5.5V 버퍼 Voltage range (4.5V to 5.5V), average drive strength (8mA), average propagation delay (9ns)

기술 문서

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모두 보기19

	유형	직함		날짜
*	Data sheet	SN74AHCT1G126 Single Bus Buffer Gate With 3-State Output datasheet (Rev. L)	PDF \| HTML	2024/03/19
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		2021/07/26
	Selection guide	Little Logic Guide 2018 (Rev. G)		2018/07/06
	Selection guide	Logic Guide (Rev. AB)		2017/06/12
	Application note	How to Select Little Logic (Rev. A)		2016/07/26
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015/12/02
	User guide	LOGIC Pocket Data Book (Rev. B)		2007/01/16
	Product overview	Design Summary for WCSP Little Logic (Rev. B)		2004/11/04
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		2004/07/08
	Application note	Selecting the Right Level Translation Solution (Rev. A)		2004/06/22
	Application note	Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)		2002/12/02
	Application note	Texas Instruments Little Logic Application Report		2002/11/01
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		2002/08/29
	Design guide	AHC/AHCT Designer's Guide February 2000 (Rev. D)		2000/02/24
	Product overview	Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)		1998/04/01
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices		1997/12/01
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)		1997/08/01
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)		1997/06/01
	Application note	Live Insertion		1996/10/01