제품 상세 정보

Resolution (Bits) 12 Sample rate (max) (ksps) 400 Number of input channels 4 Interface type SPI Architecture SAR Input type Pseudo-Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 9 Analog supply (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 SNR (dB) 71 Digital supply (min) (V) 4.5 Digital supply (max) (V) 5.5
Resolution (Bits) 12 Sample rate (max) (ksps) 400 Number of input channels 4 Interface type SPI Architecture SAR Input type Pseudo-Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 9 Analog supply (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 SNR (dB) 71 Digital supply (min) (V) 4.5 Digital supply (max) (V) 5.5
SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Maximum Throughput 400 KSPS
  • Built-In Reference and 8× FIFO
  • Differential/Integral Nonlinearity Error:
    ±1 LSB
  • Signal-to-Noise and Distortion Ratio:
    69 dB, fi = 12 kHz
  • Spurious Free Dynamic Range: 75 dB,
    fi = 12 kHz
  • SPI/DSP-Compatible Serial Interfaces With SCLK up to 20 MHz
  • Single Supply 5 Vdc
  • Analog Input Range 0 V to Supply Voltage With 500 kHz BW
  • Hardware Controlled and Programmable Sampling Period
  • Low Operating Current (4 mA at 5.5 V External Ref, 6 mA at 5.5 V, Internal Ref)
  • Power Down: Software/Hardware Power-Down Mode (1 uA Max, Ext Ref),
    Auto Power-Down Mode (1 uA, Ext Ref)
  • Programmable Auto-Channel Sweep
  • Maximum Throughput 400 KSPS
  • Built-In Reference and 8× FIFO
  • Differential/Integral Nonlinearity Error:
    ±1 LSB
  • Signal-to-Noise and Distortion Ratio:
    69 dB, fi = 12 kHz
  • Spurious Free Dynamic Range: 75 dB,
    fi = 12 kHz
  • SPI/DSP-Compatible Serial Interfaces With SCLK up to 20 MHz
  • Single Supply 5 Vdc
  • Analog Input Range 0 V to Supply Voltage With 500 kHz BW
  • Hardware Controlled and Programmable Sampling Period
  • Low Operating Current (4 mA at 5.5 V External Ref, 6 mA at 5.5 V, Internal Ref)
  • Power Down: Software/Hardware Power-Down Mode (1 uA Max, Ext Ref),
    Auto Power-Down Mode (1 uA, Ext Ref)
  • Programmable Auto-Channel Sweep

The TLC2558 and TLC2554 are a family of high-performance, 12-bit low power, 1.6 us, CMOS analog-to-digital converters (ADC) which operate from a single 5 V power supply. These devices have three digital inputs and a 3-state output [chip select (CS\), serial input-output clock (SCLK), serial data input (SDI), and serial data output (SDO)] that provide a direct 4-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a DSP, a frame sync (FS) signal is used to indicate the start of a serial data frame.

In addition to a high-speed A/D converter and versatile control capability, these devices have an on-chip analog multiplexer that can select any analog inputs or one of three internal self-test voltages. The sample-and-hold function is automatically started after the fourth SCLK edge (normal sampling) or can be controlled by a special pin, CSTART\, to extend the sampling period (extended sampling). The normal sampling period can also be programmed as short (12 SCLKs) or as long (24 SCLKs) to accommodate faster SCLK operation popular among high-performance signal processors. The TLC2558 and TLC2554 are designed to operate with very low power consumption. The power-saving feature is further enhanced with software/hardware/auto power down modes and programmable conversion speeds. The converter uses the external SCLK as the source of the conversion clock to achieve higher (up to 1.6 us when a 20 MHz SCLK is used) conversion speed. There is a 4-V internal reference available. An optional external reference can also be used to achieve maximum flexibility.

The TLC2558 and TLC2554 are a family of high-performance, 12-bit low power, 1.6 us, CMOS analog-to-digital converters (ADC) which operate from a single 5 V power supply. These devices have three digital inputs and a 3-state output [chip select (CS\), serial input-output clock (SCLK), serial data input (SDI), and serial data output (SDO)] that provide a direct 4-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a DSP, a frame sync (FS) signal is used to indicate the start of a serial data frame.

In addition to a high-speed A/D converter and versatile control capability, these devices have an on-chip analog multiplexer that can select any analog inputs or one of three internal self-test voltages. The sample-and-hold function is automatically started after the fourth SCLK edge (normal sampling) or can be controlled by a special pin, CSTART\, to extend the sampling period (extended sampling). The normal sampling period can also be programmed as short (12 SCLKs) or as long (24 SCLKs) to accommodate faster SCLK operation popular among high-performance signal processors. The TLC2558 and TLC2554 are designed to operate with very low power consumption. The power-saving feature is further enhanced with software/hardware/auto power down modes and programmable conversion speeds. The converter uses the external SCLK as the source of the conversion clock to achieve higher (up to 1.6 us when a 20 MHz SCLK is used) conversion speed. There is a 4-V internal reference available. An optional external reference can also be used to achieve maximum flexibility.

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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
ADC124S051 활성 4채널, 200ksps~500kSPS, 12비트 A/D 컨버터 Higher sampling rate (500 kSPS)

기술 문서

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
모두 보기3
유형 직함 날짜
* Data sheet 5-V, 12-Bit, 400 KSPS, 4/8 Channel, Low Power, Serial A-D Converter datasheet (Rev. A) 1999/07/01
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs 2015/05/21
Application note Determining Minimum Acquisition Times for SAR ADCs, part 2 2011/03/17

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계산 툴

ANALOG-ENGINEER-CALC — 아날로그 엔지니어의 계산기

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
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PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
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TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
사용 설명서: PDF
패키지 다운로드
SOIC (D) 16 옵션 보기
TSSOP (PW) 16 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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