TXU0101

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제품 상세 정보

Technology family TXU Applications GPIO Bits (#) 1 Configuration 1 Ch A to B 0 Ch B to A High input voltage (min) (V) 0.44 High input voltage (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 5.5 Data rate (max) (Mbps) 200 IOH (max) (mA) -12 IOL (max) (mA) -12 Supply current (max) (µA) 5.5 Features .8, 1.45, 4.2, 4.64 Input type Schmitt-Trigger Output type 3-State Rating Catalog Operating temperature range (°C) -40 to 125
Technology family TXU Applications GPIO Bits (#) 1 Configuration 1 Ch A to B 0 Ch B to A High input voltage (min) (V) 0.44 High input voltage (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 5.5 Data rate (max) (Mbps) 200 IOH (max) (mA) -12 IOL (max) (mA) -12 Supply current (max) (µA) 5.5 Features .8, 1.45, 4.2, 4.64 Input type Schmitt-Trigger Output type 3-State Rating Catalog Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8 SOT-SC70 (DCK) 6 4.2 mm² 2 x 2.1 USON (DRY) 6 1.45 mm² 1.45 x 1 X2SON (DTQ) 6 0.8 mm² 1 x 0.8
  • Fully configurable dual-rail design allows each port to operate from 1.1V to 5.5V
  • Up to 200Mbps support for 3.3V to 5.0V
  • Schmitt-trigger inputs allows for slow and noisy inputs
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • High drive strength (up to 12mA at 5V)
  • Low power consumption:
    • 2.5µA maximum (25°C)
    • 6µA maximum (–40°C to 125°C)
  • VCC isolation and VCC disconnect (Ioff-float) feature
    • If either VCC input is <100mV or disconnected, all outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
  • Pinout compatible with TXB family level shifters
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22:
    • 2500-V human-body model
    • 1500-V charged-device model
  • Fully configurable dual-rail design allows each port to operate from 1.1V to 5.5V
  • Up to 200Mbps support for 3.3V to 5.0V
  • Schmitt-trigger inputs allows for slow and noisy inputs
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • High drive strength (up to 12mA at 5V)
  • Low power consumption:
    • 2.5µA maximum (25°C)
    • 6µA maximum (–40°C to 125°C)
  • VCC isolation and VCC disconnect (Ioff-float) feature
    • If either VCC input is <100mV or disconnected, all outputs are disabled and become high-impedance
  • Ioff supports partial-power-down mode operation
  • Control logic (OE) with VCC(MIN) circuitry allows for control from either A or B port
  • Pinout compatible with TXB family level shifters
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22:
    • 2500-V human-body model
    • 1500-V charged-device model

TXU0101 is a 1-bit, dual-supply noninverting fixed direction voltage level translation device. A pin is referenced to VCCA logic level, OE pin can be referenced to either VCCA or VCCB logic levels, and B pin is referenced to VCCB logic level. The A port is able to accept input voltages ranging from 1.1V to 5.5V, while the B port can also accept input voltages from 1.1V to 5.5V. Fixed direction data transmission can occur from A to B when OE is set to high in reference to either supply. When OE is set to low, all output pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

TXU0101 is a 1-bit, dual-supply noninverting fixed direction voltage level translation device. A pin is referenced to VCCA logic level, OE pin can be referenced to either VCCA or VCCB logic levels, and B pin is referenced to VCCB logic level. The A port is able to accept input voltages ranging from 1.1V to 5.5V, while the B port can also accept input voltages from 1.1V to 5.5V. Fixed direction data transmission can occur from A to B when OE is set to high in reference to either supply. When OE is set to low, all output pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

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모두 보기5
유형 직함 날짜
* Data sheet TXU0101 Dual-Bit Fixed Direction Voltage-Level Translator with Schmitt-Trigger Inputs and 3-State Outputs datasheet (Rev. A) PDF | HTML 2024/05/09
Application brief Enabling Power-Efficient FPGA Designs With Level Translation PDF | HTML 2024/04/30
Product overview Enabling System on Module Industrial PC Connectivity With Level Translation PDF | HTML 2023/04/03
Application brief Enabling Next Generation Processors, FPGA, and ASSP with Voltage Level Translat PDF | HTML 2023/01/17
Application brief Enabling Next Generation Wireless Beacons with Level Translation PDF | HTML 2022/04/14

설계 및 개발

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평가 보드

5-8-LOGIC-EVM — 5핀~8핀 DCK, DCT, DCU, DRL 및 DBV 패키지용 일반 논리 평가 모듈

5~8핀 수의 DCK, DCT, DCU, DRL 또는 DBV 패키지가 있는 모든 디바이스를 지원하도록 설계된 유연한 EVM.
사용 설명서: PDF
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평가 보드

5-8-NL-LOGIC-EVM — 5-8핀 DPW, DQE, DRY, DSF, DTM, DTQ 및 DTT 패키지를 지원하는 일반 로직 및 변환 EVM

DTT, DRY, DPW, DTM, DQE, DQM, DSF 또는 DTQ 패키지가 있는 로직 또는 변환 디바이스를 지원하도록 설계된 일반 EVM. 보드 설계는 유연한 평가가 가능합니다.

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패키지 다운로드
SOT-23 (DBV) 6 옵션 보기
SOT-SC70 (DCK) 6 옵션 보기
USON (DRY) 6 옵션 보기
X2SON (DTQ) 6 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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