ADC083000
Key Specifications
Resolution | 8 Bits |
Max Conversion Rate | 3 GSPS (min) |
Error Rate | 10 |
ENOB @ 748 MHz Input | 7.0 Bits (typ) |
SNR @ 748 MHz | 44.5 dB (typ) |
Full Power Bandwidth | 3 GHz (typ) |
Operating | 1.9 W (typ) |
Power Down Mode | 25 mW (typ) |
The ADC083000 is a single, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 3.4 GSPS. Consuming a typical 1.9 Watts at 3 GSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the self-calibration scheme enable an excellent response of all dynamic parameters up to Nyquist, producing a high 7.0 Effective Number Of Bits, (ENOB) with a 748 MHz input signal and a 3 GHz sample rate while providing a 10
The ADC has a 1:4 demultiplexer that feeds four LVDS buses and reduces the output data rate on each bus to a quarter of the sampling rate.
The converter typically consumes less than 25 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad LQFP and operates over the Industrial (-40°C
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | ADC083000 8-Bit, 3 GSPS, High Performance, Low Power A/D Converter datasheet (Rev. N) | 2009年 7月 6日 | |
Technical article | RF sampling: aliasing can be your friend | PDF | HTML | 2015年 7月 22日 | |
User guide | Single low power, ultra high speed CMOS A/D Converter User Guide | 2012年 1月 27日 | ||
Application note | Selecting Amplifiers, ADCs, and Clocks for High-Performance Signal Paths | 2007年 9月 13日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
HLQFP (NNB) | 128 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
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