AM26C32
- Meets or exceeds the requirements of ANSI TIA/EIA-422-B, TIA/EIA-423-B, and ITU recommendation V.10 and V.11
- Low power, I CC = 10 mA typical
- ±7-V Common-mode range with ±200-mV sensitivity
- Input hysteresis: 60 mV typical
- t pd = 17 ns typical
- Operates from a single 5-V supply
- 3-State outputs
- Input fail-safe circuitry
- Improved replacements for AM26LS32 device
- Available in Q-temp automotive
The AM26C32 device is a quadruple differential line receiver for balanced or unbalanced digital data transmission. The enable function is common to all four receivers and offers a choice of active-high or active-low input. The 3-state outputs permit connection directly to a bus-organized system. Fail-safe design specifies that if the inputs are open, the outputs always are high. The AM26C32 devices are manufactured using a BiCMOS process, which is a combination of bipolar and CMOS transistors. This process provides the high voltage and current of bipolar with the low power of CMOS to reduce the power consumption to about one-fifth that of the standard AM26LS32, while maintaining AC and DC performance.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | AM26C32 Quadruple Differential Line Receiver datasheet (Rev. M) | PDF | HTML | 2023年 10月 16日 |
| Application note | Debugging Sitara AM2x Microcontrollers | PDF | HTML | 2022年 10月 24日 |
設計與開發
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| 封裝 | 引腳 | 下載 |
|---|---|---|
| PDIP (N) | 16 | 檢視選項 |
| SOIC (D) | 16 | 檢視選項 |
| SOP (NS) | 16 | 檢視選項 |
| SSOP (DB) | 16 | 檢視選項 |
| TSSOP (PW) | 16 | 檢視選項 |
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