CD74AC574
- Buffered inputs
- Typical propagation delay:
6.5 ns @ VCC = 5 V, TA = 25°C, CL = 50 pF - Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015
- SCR-Latchup-resistant CMOS process and circuit design
- Speed of bipolar FAST*/AS/S with significantly reduced power consumption
- Balanced propagation delays
- AC types feature 1.5-V to 5.5-V operation and balanced noise immunity at 30% of the supply
- ±24-mA output drive current
-Fanout to 15 FAST* ICs
-Drives 50-ohm transmission lines - Characterized for operation from –40° to 85°C
*FAST is a Registered Trademark of Fairchild Semiconductor Corp.
The RCA-CD54/74AC564 and CD54/74AC574 and the CD54/74ACT564 and CD54/74ACT574 octal D-type, 3-state, positive-edge-triggered flip-flops use the RCA ADVANCED CMOS technology. The eight flip-flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). The Output Enable (OE\) controls the 3-state outputs and is independent of the register operation. When the Output Enable (OE\) is HIGH, the outpus are in the high-impendance state. The CD54/74AC/ACT564 and CD54/74AC/ACT574 share the same pin configurations; the CD54/74AC/ACT564, however, has inverted outputs and the CD54/74AC/ACT574 has non-inverted outputs.
The CD74AC/ACT564 and CD74AC/ACT574 are supplied in 20-lead dual-in-line plastic packages (E suffix) and in 20-lead dual-in-line small-outline plastic pakcages (M suffix). Both package types are operable over the following temperature range: Commercial (0- to 70°C); Industrial (-40 to +85°C); and Extended Industrial/Military (-55 to +125°C).
The CD54AC/ACT564 and CD54AC/ACT574, available in chip form (H suffix), are operable over the -55 to +125°C temperature range.
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14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
封裝 | 引腳 | 下載 |
---|---|---|
PDIP (N) | 20 | 檢視選項 |
SOIC (DW) | 20 | 檢視選項 |
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