產品詳細資料

Configuration 8:1 Number of channels 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Power supply voltage - dual (V) +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 40 CON (typ) (pF) 25 ON-state leakage current (max) (µA) 4 Bandwidth (MHz) 180 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 10 Negative rail supply voltage (max) (V) 0
Configuration 8:1 Number of channels 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Power supply voltage - dual (V) +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 40 CON (typ) (pF) 25 ON-state leakage current (max) (µA) 4 Bandwidth (MHz) 180 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 10 Negative rail supply voltage (max) (V) 0
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 20 131.84 mm² 12.8 x 10.3
  • Wide Analog Input Voltage Range...±5V (Max)
  • Low "On" Resistance
    • VCC - VEE = 4.5V...70 (Typ)
    • VCC - VEE = 9V...40 (Typ)
  • Low Crosstalk Between Switches
  • Fast Switching and Propagation Speeds
  • "Break-Before-Make" Switching
  • Wide Operating Temperature Range...–55°C to 125°C
  • HC Types
    • 2V to 6V Operation, Control; 0V to 10V Switch
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation, Control; 0V to 10V Switch
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor

  • Wide Analog Input Voltage Range...±5V (Max)
  • Low "On" Resistance
    • VCC - VEE = 4.5V...70 (Typ)
    • VCC - VEE = 9V...40 (Typ)
  • Low Crosstalk Between Switches
  • Fast Switching and Propagation Speeds
  • "Break-Before-Make" Switching
  • Wide Operating Temperature Range...–55°C to 125°C
  • HC Types
    • 2V to 6V Operation, Control; 0V to 10V Switch
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation, Control; 0V to 10V Switch
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor

The ’HC4351, CD74HCT4351, and CD74HC4352 are digitally controlled analog switches which utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.

These analog multiplexers/demultiplexers are, in essence, the HC/HCT4015 and HC4052 preceded by address latches that are controlled by an active low Latch Enable input (LE\). Two Enable inputs, one active low (E1\), and the other active high (E2) are provided allowing enabling with either input voltage level.

The ’HC4351, CD74HCT4351, and CD74HC4352 are digitally controlled analog switches which utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL with the low power consumption of standard CMOS integrated circuits.

These analog multiplexers/demultiplexers are, in essence, the HC/HCT4015 and HC4052 preceded by address latches that are controlled by an active low Latch Enable input (LE\). Two Enable inputs, one active low (E1\), and the other active high (E2) are provided allowing enabling with either input voltage level.

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類型 標題 日期
* Data sheet CD54HC4351, CD74HC4351, CD74HCT4351, CD74HC4352 datasheet (Rev. C) 2003年 6月 20日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021年 7月 26日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
User guide Signal Switch Data Book (Rev. A) 2003年 11月 14日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997年 6月 1日
Application note Designing With Logic (Rev. C) 1997年 6月 1日
Application note Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
Application note Live Insertion 1996年 10月 1日
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996年 5月 1日
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996年 4月 1日

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