DS26F32MQML-SP

現行

四差動線路接收器

產品詳細資料

Number of receivers 4 Number of transmitters 0 Duplex Half Supply voltage (nom) (V) 5 Signaling rate (max) (MBits) 10 IEC 61000-4-2 contact (±V) None Common-mode range (V) -6 to 6 Number of nodes 10 Isolated No Supply current (max) (µA) 50000 Rating Space Operating temperature range (°C) -55 to 125
Number of receivers 4 Number of transmitters 0 Duplex Half Supply voltage (nom) (V) 5 Signaling rate (max) (MBits) 10 IEC 61000-4-2 contact (±V) None Common-mode range (V) -6 to 6 Number of nodes 10 Isolated No Supply current (max) (µA) 50000 Rating Space Operating temperature range (°C) -55 to 125
CDIP (NFE) 16 134.209409 mm² 6.731 x 19.939 CFP (NAD) 16 62.9285 mm² 9.91 x 6.35
  • Input Voltage Range of ±7.0V (Differential or Common Mode) ±0.2V Sensitivity over the Input Voltage Range
  • High Input Impedance
  • Operation from Single +5.0V Supply
  • Input Pull-Down Resistor Prevents Output Oscillation on Unused Channels
  • TRI-STATE Outputs, with Choice of Complementary Enables, for Receiving Directly onto a Data Bus

All trademarks are the property of their respective owners.

  • Input Voltage Range of ±7.0V (Differential or Common Mode) ±0.2V Sensitivity over the Input Voltage Range
  • High Input Impedance
  • Operation from Single +5.0V Supply
  • Input Pull-Down Resistor Prevents Output Oscillation on Unused Channels
  • TRI-STATE Outputs, with Choice of Complementary Enables, for Receiving Directly onto a Data Bus

All trademarks are the property of their respective owners.

The DS26F32 is a quad differential line receiver designed to meet the requirements of EIA Standards RS-422 and RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission.

The DS26F32 offers improved performance due to the use of state-of-the-art L-FAST bipolar technology. The L-FAST technology allows for higher speeds and lower currents by utilizing extremely short gate delay times. Thus, the DS26F32 features lower power, extended temperature range, and improved specifications.

The device features an input sensitivity of 200 mV over the input common mode range of ±7.0V. The DS26F32 provides an enable function common to all four receivers and TRI-STATE outputs with 8.0 mA sink capability. Also, a fail-safe input/output relationship keeps the outputs high when the inputs are open.

The DS26F32 offers optimum performance when used with the DS26F31 Quad Differential Line Driver.

The DS26F32 is a quad differential line receiver designed to meet the requirements of EIA Standards RS-422 and RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission.

The DS26F32 offers improved performance due to the use of state-of-the-art L-FAST bipolar technology. The L-FAST technology allows for higher speeds and lower currents by utilizing extremely short gate delay times. Thus, the DS26F32 features lower power, extended temperature range, and improved specifications.

The device features an input sensitivity of 200 mV over the input common mode range of ±7.0V. The DS26F32 provides an enable function common to all four receivers and TRI-STATE outputs with 8.0 mA sink capability. Also, a fail-safe input/output relationship keeps the outputs high when the inputs are open.

The DS26F32 offers optimum performance when used with the DS26F31 Quad Differential Line Driver.

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類型 標題 日期
* Data sheet DS26F32MQML Quad Differential Line Receivers datasheet (Rev. A) 2013年 4月 15日
* SMD DS26F32MQML-SP SMD 5962R7802005VFA 2016年 6月 21日
* Radiation & reliability report DS26F32MQML-SP - Total Ionizing Dose (TID) Report 2012年 5月 9日
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 2023年 8月 31日
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 2022年 11月 17日
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022年 10月 19日
Selection guide TI Space Products (Rev. I) 2022年 3月 3日
Application brief Space-Grade, 100-krad, Isolated Serial Peripheral Interface (SPI) RS-422 Circuit PDF | HTML 2021年 6月 30日
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Application note AN-903 A Comparison of Differential Termination Techniques (Rev. B) 2013年 4月 26日

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CFP (NAD) 16 檢視選項

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