首頁 介面 LVDS、M-LVDS 和 PECL IC
首頁
介面
LVDS、M-LVDS 和 PECL IC

DS90LV804

現行

4 通道 800 Mbps LVDS 緩衝器/中繼器

立即訂購
產品規格表

DS90LV804

現行
產品規格表 立即訂購

產品詳細資料

Function Buffer Protocols LVDS Number of transmitters 4 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (MBits) 800 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Buffer Protocols LVDS Number of transmitters 4 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (MBits) 800 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
WQFN (RTV) 32 25 mm² 5 x 5
  • 800 Mbps Data Rate per Channel
  • Low Output Skew and Jitter
  • LVDS/CML/LVPECL Compatible Input, LVDS Output
  • On-Chip 100Ω Input and Output Termination
  • 12 kV ESD Protection on LVDS Outputs
  • Single 3.3V Supply
  • Very Low Power Consumption
  • Industrial -40 to +85°C Temperature Range
  • Small WQFN Package Footprint

All trademarks are the property of their respective owners.

  • 800 Mbps Data Rate per Channel
  • Low Output Skew and Jitter
  • LVDS/CML/LVPECL Compatible Input, LVDS Output
  • On-Chip 100Ω Input and Output Termination
  • 12 kV ESD Protection on LVDS Outputs
  • Single 3.3V Supply
  • Very Low Power Consumption
  • Industrial -40 to +85°C Temperature Range
  • Small WQFN Package Footprint

All trademarks are the property of their respective owners.

The DS90LV804 is a four channel 800 Mbps LVDS buffer/repeater. In many large systems, signals are distributed across cables and signal integrity is highly dependent on the data rate, cable type, length, and the termination scheme.

In order to maximize signal integrity, the DS90LV804 features both an internal input and output (source) termination to eliminate these extra components from the board, and to also place the terminations as close as possible to receiver inputs and driver output. This is especially significant when driving longer cables.

The DS90LV804, available in the WQFN (Leadless Leadframe Package) package, minimizes the footprint, and improves system performance.

An output enable pin is provided, which allows the user to place the LVDS outputs and internal biasing generators in a TRI-STATE, low power mode.

The differential inputs interface to LVDS, and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The differential inputs are internally terminated with a 100Ω resistor to improve performance and minimize board space. This function is especially useful for boosting signals over lossy cables or point-to-point backplane configurations.

The DS90LV804 is a four channel 800 Mbps LVDS buffer/repeater. In many large systems, signals are distributed across cables and signal integrity is highly dependent on the data rate, cable type, length, and the termination scheme.

In order to maximize signal integrity, the DS90LV804 features both an internal input and output (source) termination to eliminate these extra components from the board, and to also place the terminations as close as possible to receiver inputs and driver output. This is especially significant when driving longer cables.

The DS90LV804, available in the WQFN (Leadless Leadframe Package) package, minimizes the footprint, and improves system performance.

An output enable pin is provided, which allows the user to place the LVDS outputs and internal biasing generators in a TRI-STATE, low power mode.

The differential inputs interface to LVDS, and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The differential inputs are internally terminated with a 100Ω resistor to improve performance and minimize board space. This function is especially useful for boosting signals over lossy cables or point-to-point backplane configurations.
open-in-new 尋找其它 LVDS、M-LVDS 和 PECL IC
下載 觀看有字幕稿的影片 影片

您可能會感興趣的類似產品

open-in-new 比較替代產品
功能相同，但引腳輸出與所比較的產品不同
DS90LV004 現行 具預強調功能的 4 通道 LVDS 緩衝器/中繼器 Similar functionality with pre-emphasis and higher signalling rates

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 4
類型 標題 日期
* Data sheet DS90LV804 4-Channel 800 Mbps LVDS Buffer/Repeater datasheet (Rev. L) 2013年 5月 16日
Application note Signaling Rate vs. Distance for Differential Buffers 2010年 1月 26日
White paper Making the Most of Your LVDS - 5 Tips for Buffering Signal Integrity Headaches 2001年 8月 1日
Application note An Overview of LVDS Technology 1998年 10月 5日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

DS90LV804 IBIS Model

SNLM025.ZIP (11 KB) - IBIS Model
下載
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
要求
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
檢視選項
封裝 引腳 下載
WQFN (RTV) 32 檢視選項
適用 TI 的評估品項標準條款與條件。

訂購與品質

內含資訊：
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

以英文檢視所有論壇主題

內容係由 TI 和社群貢獻者依「現狀」提供，且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題，請參閱 TI 支援。​​​​​​​​​​​​​​

影片