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DS90LVRA2-Q1

現行

車用、1.8V 至 3.6V、600Mbps LVDS 雙差動線路接收器

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DS90LVRA2-Q1

現行
產品規格表 立即訂購

產品詳細資料

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 2 Supply voltage (V) 1.8 Signaling rate (MBits) 600 Input signal LVDS Rating Automotive Operating temperature range (°C) -40 to 125
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 2 Supply voltage (V) 1.8 Signaling rate (MBits) 600 Input signal LVDS Rating Automotive Operating temperature range (°C) -40 to 125
WSON (DEM) 8 4 mm² 2 x 2
  • AEC-Q100 and AEC-Q006 qualified for automotive applications
    • Temperature grade 2: −40°C to +105°C
  • 600Mbps (300MHz) switching rates
  • 50ps differential skew (typical)
  • 0.1ns channel-to-channel skew (typical)
  • Supports 1.8V to 3.3V power supply
  • Flow-through pinout
  • Power down high impedance on LVDS inputs
  • Output slew rate control
  • LVDS inputs accept LVDS/CML/LVPECL signals
  • Conforms to ANSI/TIA/EIA-644 standard
  • Pin compatible with DS90LV028A-Q1
  • AEC-Q100 and AEC-Q006 qualified for automotive applications
    • Temperature grade 2: −40°C to +105°C
  • 600Mbps (300MHz) switching rates
  • 50ps differential skew (typical)
  • 0.1ns channel-to-channel skew (typical)
  • Supports 1.8V to 3.3V power supply
  • Flow-through pinout
  • Power down high impedance on LVDS inputs
  • Output slew rate control
  • LVDS inputs accept LVDS/CML/LVPECL signals
  • Conforms to ANSI/TIA/EIA-644 standard
  • Pin compatible with DS90LV028A-Q1

The DS90LVRA2-Q1 is a dual CMOS differential line receiver designed for applications requiring high input common mode range, high data rates, and CMOS output with slew rate control. The device is designed to support data rates of 600Mbps (300MHz) utilizing low voltage differential signaling (LVDS) technology.

The DS90LVRA2-Q1 accepts low voltage (350mV typical) differential input signals and translates them from 1.8V to 3.3V CMOS output levels depending on power supply voltage. The DS90LVRA2-Q1 has a flow-through design for easy PCB layout.

The DS90LVRA2-Q1 and companion LVDS line driver DS90LV027AQ provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

The DS90LVRA2-Q1 is a dual CMOS differential line receiver designed for applications requiring high input common mode range, high data rates, and CMOS output with slew rate control. The device is designed to support data rates of 600Mbps (300MHz) utilizing low voltage differential signaling (LVDS) technology.

The DS90LVRA2-Q1 accepts low voltage (350mV typical) differential input signals and translates them from 1.8V to 3.3V CMOS output levels depending on power supply voltage. The DS90LVRA2-Q1 has a flow-through design for easy PCB layout.

The DS90LVRA2-Q1 and companion LVDS line driver DS90LV027AQ provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.
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* Data sheet DS90LVRA2-Q1 Automotive LVDS Dual Differential Line Receiver datasheet PDF | HTML 2023年 12月 14日
Application brief Enabling LVDS Links for Low Power FPGAs, Processors, and ASIC Implementations (Rev. A) PDF | HTML 2024年 3月 25日

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DS90LVRA2EVM — 適用雙通道 LVDS 接收器的 DS90LVRA2 評估模組

DS90LVRA2 EVM 是一款專為德州儀器 DS90LVRA2 LVDS 雙差動線路接收器性能與功能評估而設計的評估模組。

使用者可運用此套件快速評估 DS90LVRA2 支援的輸出波形特性和訊號完整性。SMA 允許存取 DS90LVRA2 輸入和輸出，也可幫助與實驗室設備或使用者系統的連接，以進行性能評估。

使用指南: PDF | HTML
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