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LVDS、M-LVDS 和 PECL IC

DSLVDS1001

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400 Mbps LVDS 單路高速差動驅動器

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產品規格表

DSLVDS1001

最後一次購買
產品規格表 立即訂購

產品詳細資料

Function Driver Protocols LVDS Number of transmitters 1 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVCMOS, LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver Protocols LVDS Number of transmitters 1 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVCMOS, LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Designed for signaling rates up to 400-Mbps
  • Single 3.3-V Power Supply (3-V to 3.6-V Range)
  • 700-ps (100-ps typical) maximum differential skew
  • 1.5-ns maximum propagation delay
  • Drives small swing (±350-mV) differential signal levels
  • Power off protection (Outputs in TRI-STATE)
  • Flow-through pinout simplifies PCB layout
  • Low power dissipation (23-mW at 3.3 V typical)
  • 5-pin SOT-23 package
  • Meets or exceeds ANSI TIA/EIA-644-A standard
  • Industrial temperature operating range (–40°C to +85°C)
  • Designed for signaling rates up to 400-Mbps
  • Single 3.3-V Power Supply (3-V to 3.6-V Range)
  • 700-ps (100-ps typical) maximum differential skew
  • 1.5-ns maximum propagation delay
  • Drives small swing (±350-mV) differential signal levels
  • Power off protection (Outputs in TRI-STATE)
  • Flow-through pinout simplifies PCB layout
  • Low power dissipation (23-mW at 3.3 V typical)
  • 5-pin SOT-23 package
  • Meets or exceeds ANSI TIA/EIA-644-A standard
  • Industrial temperature operating range (–40°C to +85°C)

The DSLVDS1001 device is a single-channel, Low-Voltage Differential Signaling (LVDS) driver device designed for applications requiring low power dissipation, low noise, and high data rates. In addition, the short-circuit fault current is also minimized. The device is designed to support data rates that are up to 400-Mbps (200-MHz) using LVDS technology.

The DSLVDS1001 accepts a 3.3-V LVCMOS/LVTTL input level and outputs low voltage (±350-mV typical) differential signals that have low electromagnetic interference (EMI). The device is in a 5-pin SOT-23 package that is designed for easy PCB layout. The DSLVDS1001 can be paired with its companion single line receiver, the DSLVDS1002, or with any LVDS receiver, to provide a high-speed LVDS interface.

The DSLVDS1001 device is a single-channel, Low-Voltage Differential Signaling (LVDS) driver device designed for applications requiring low power dissipation, low noise, and high data rates. In addition, the short-circuit fault current is also minimized. The device is designed to support data rates that are up to 400-Mbps (200-MHz) using LVDS technology.

The DSLVDS1001 accepts a 3.3-V LVCMOS/LVTTL input level and outputs low voltage (±350-mV typical) differential signals that have low electromagnetic interference (EMI). The device is in a 5-pin SOT-23 package that is designed for easy PCB layout. The DSLVDS1001 can be paired with its companion single line receiver, the DSLVDS1002, or with any LVDS receiver, to provide a high-speed LVDS interface.
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類型 標題 日期
* Data sheet DSLVDS1001 400-Mbps, Single-Channel LVDS Driver datasheet (Rev. A) PDF | HTML 2018年 12月 13日
Application brief LVDS to Improve EMC in Motor Drives 2018年 9月 27日
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018年 8月 3日
EVM User's guide DSLVDS1001-1002EVM User's Guide 2018年 7月 20日
Application brief How to Terminate LVDS Connections with DC and AC Coupling 2018年 5月 16日
Application note An Overview of LVDS Technology 1998年 10月 5日

設計與開發

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開發板

DSLVDS1001-1002EVM — 單通道 LVDS 驅動器和接收器評估模組

The DSLVDS1001-1002EVM is an evaluation module designed for performance and functional evaluation of the Texas Instruments DSLVDS1001 3.3-V LVDS  Differential Line Driver and DSLVDS1002 3.3-V LVDS Differential Line Receiver. With this kit, users can quickly evaluate the output waveform (...)
使用指南: PDF
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模擬型號

DSLVDS1001 IBIS Model

SNLM224.ZIP (8 KB) - IBIS Model
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
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