JFE2140
- Ultra-low noise:
- Voltage noise:
- 0.9 nV/√ Hz at 1 kHz, I DS = 5 mA
- 1.1 nV/√ Hz at 1 kHz, I DS = 2 mA
- Current noise: 1.6 fA/√ Hz at 1 kHz
- Voltage noise:
- Low V GS mismatch: 4 mV (max)
- Low gate current: 10 pA (max)
-
Low input capacitance: 13 pF at V DS = 5 V
-
High gate-to-drain and gate-to-source breakdown voltage: –40 V
-
High transconductance: 30 mS
-
Packages: SOIC, 2-mm × 2-mm WSON
The JFE2140 is a Burr-Brown™ Audio, matched-pair discrete JFET built using Texas Instruments’ modern, high-performance, analog bipolar process. The JFE2140 features performance not previously available in older discrete JFET technologies. The JFE2140 offers excellent noise performance across all current ranges, where the quiescent current can be set by the user from 50 µA to 20 mA. When biased at 5 mA, the device yields 0.9 nV/√ Hz of input-referred noise, giving ultra-low noise performance with extremely high input impedance (> 1 TΩ). In addition, the matching between JFETs is tested to ±4 mV, providing low offset and high CMRR performance for differential pair configurations. The JFE2140 also features integrated diodes connected to separate clamp nodes to provide protection without the addition of high leakage, nonlinear external diodes.
The JFE2140 can withstand a high drain-to-source voltage of 40‑V, as well as gate-to-source and gate-to-drain voltages down to –40 V. The temperature range is specified from –40°C to +125°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | JFE2140 Ultra-Low Noise, Matched, Dual, Low-Gate Current, Discrete, Audio, N‑Channel JFET datasheet (Rev. B) | PDF | HTML | 2023年 8月 31日 |
| Application note | JFE2140 Ultra-Low-Noise Pre-Amplifier | PDF | HTML | 2023年 3月 2日 | |
| User guide | JFE2140 Evaluation Module Users Guide | PDF | HTML | 2022年 9月 20日 | |
| Certificate | JFE2140EVM EU RoHS Declaration of Conformity (DoC) | 2022年 9月 7日 |
設計與開發
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DIP-ADAPTER-EVM — DIP 轉接器評估模組
Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.
The (...)
JFE2140EVM — 適用於超低雜訊、低閘極電流、音訊、N 通道 JFET 的 JFE2140 評估模組
JFE2140 評估模組 (EVM) 提供對 JFE2140 的基本功能評估。EVM 位於閉合迴路前置放大器配置中，並於分離 ±5-V 電源供電上提供 60 dB 增益。可以對各種電路配置進行用戶修改。
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 引腳 | 下載 |
|---|---|---|
| SOIC (D) | 8 | 檢視選項 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。