LM2103
- Drives two N-channel MOSFETs in half-bridge configuration
- 8-V typical undervoltage lockout on GVDD
- 107-V absolute maximum voltage on BST
- –19.5-V absolute maximum negative transient voltage handling on SH
- 0.5-A/0.8-A peak source/sink currents
- 475-ns typical fixed internal dead-time
- Built-in cross conduction prevention
- 115-ns typical propagation delay
- Inverting input pin INL
The LM2103 is a compact, high-voltage gate driver designed to drive both the high-side and the low-side N-channel MOSFETs in a synchronous buck or a half-bridge configuration. The INL inverting input allows the driver to be used in either dual or single PWM input applications.
The fixed dead-time and the –1-V DC and –19.5-V transient negative voltage handling on the SH pin improve the system robustness in high noise applications. The LM2103 is available in an 8-pin SOIC package compatible with industry standard pinouts. Undervoltage lockout (UVLO) is provided on both the low-side and the high-side power rails for protection during power up and power down.
技術文件
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檢視所有 2 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | LM2103 107-V, 0.5-A/0.8-A Half-Bridge Driver with 8-V UVLO, Dead Time, and Inverting Input datasheet (Rev. A) | PDF | HTML | 2023年 8月 9日 |
| Application note | How to Choose a Gate Driver for DC Motor Drives | PDF | HTML | 2023年 10月 5日 |
設計與開發
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模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
| 封裝 | 引腳 | 下載 |
|---|---|---|
| SOIC (D) | 8 | 檢視選項 |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
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