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LM3880

現行

具固定時間延遲的 3 軌簡單電源序列器

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產品規格表

LM3880

現行
產品規格表 立即訂購

產品詳細資料

Supply voltage (min) (V) 2.7 Supply voltage (max) (V) 5.5 Iq (typ) (mA) 0.025 Time delay (ms) 2, 10, 16, 30, 60, 120 Number of sequenced outputs 3 Rating Catalog Operating temperature range (°C) -40 to 125
Supply voltage (min) (V) 2.7 Supply voltage (max) (V) 5.5 Iq (typ) (mA) 0.025 Time delay (ms) 2, 10, 16, 30, 60, 120 Number of sequenced outputs 3 Rating Catalog Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8
  • Simple solution for sequencing three voltage rails from a single input signal
  • Easily cascade up to three devices to sequence as many as nine voltage rails
  • Powerup and powerdown control
  • Tiny 2.9-mm x 1.6-mm footprint
  • Low quiescent current: 25 µA
  • Input voltage range: 2.7 V to 5.5 V
  • Standard timing options available
  • Simple solution for sequencing three voltage rails from a single input signal
  • Easily cascade up to three devices to sequence as many as nine voltage rails
  • Powerup and powerdown control
  • Tiny 2.9-mm x 1.6-mm footprint
  • Low quiescent current: 25 µA
  • Input voltage range: 2.7 V to 5.5 V
  • Standard timing options available

The LM3880 simple power supply sequencer offers the easiest method to control powerup sequencing and powerdown sequencing of multiple Independent voltage rails. By staggering the startup sequence, it is possible to avoid latch conditions or large in-rush currents that can affect the reliability of the system.

Available in a 6-pin SOT-23 package, the simple sequencer contains a precision enable pin and three open-drain output flags. The open-drain output flags permit that they can be pulled up to distinct voltage supplies separate from the sequencer VDD (only if they do not exceed the recommended maximum voltage of 0.3 V greater than VDD), so as to interface with ICs requiring a range of different enable signals. When the LM3880 is enabled, the three output flags sequentially release, after individual time delays, thus permitting the connected power supplies to start up. The output flags follow a reverse sequence during power down to avoid latch conditions.

EPROM capability allows every delay and sequence to be fully adjustable. Contact Texas Instruments to request a non-standard configuration.

The LM3880 simple power supply sequencer offers the easiest method to control powerup sequencing and powerdown sequencing of multiple Independent voltage rails. By staggering the startup sequence, it is possible to avoid latch conditions or large in-rush currents that can affect the reliability of the system.

Available in a 6-pin SOT-23 package, the simple sequencer contains a precision enable pin and three open-drain output flags. The open-drain output flags permit that they can be pulled up to distinct voltage supplies separate from the sequencer VDD (only if they do not exceed the recommended maximum voltage of 0.3 V greater than VDD), so as to interface with ICs requiring a range of different enable signals. When the LM3880 is enabled, the three output flags sequentially release, after individual time delays, thus permitting the connected power supplies to start up. The output flags follow a reverse sequence during power down to avoid latch conditions.

EPROM capability allows every delay and sequence to be fully adjustable. Contact Texas Instruments to request a non-standard configuration.
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類型 標題 日期
* Data sheet LM3880 Simple Power Sequencer datasheet (Rev. M) 2021年 3月 15日
Application note High-Performance CMOS Image Sensor Power Supply in Industrial Camera and Vision (Rev. A) 2021年 7月 30日
Application brief Creating a Sequencing Voltage Supervisor (Reset IC) Using TPS386000 and LM3880 2019年 5月 14日
Selection guide Power Management Guide 2018 (Rev. R) 2018年 6月 25日
Technical article How to manage processor power during uncontrolled power off PDF | HTML 2018年 6月 21日
Technical article FPGA power made simple: sequencing PDF | HTML 2017年 11月 13日
Technical article Sequencing solutions: simple, reliable and cost-effective PDF | HTML 2017年 9月 27日
Technical article A simple six-channel power-rail sequencing solution PDF | HTML 2015年 11月 16日
Technical article Multiphase DC/DC converters provide low ripple, integrated solution for FPGA power PDF | HTML 2015年 7月 9日
Analog Design Journal Analog Applications Journal 4Q 2014 2014年 10月 24日
Analog Design Journal Power-supply sequencing for FPGAs 2014年 10月 24日
EVM User's guide AN-1491 LM3880 Power Sequencer Demo Board (Rev. A) 2013年 5月 7日
Application note LM1771 and LM3880 Based FPGA Power Supply Reference Design (Rev. A) 2013年 5月 5日
Application note AN-1603 LM274X Reference Designs (Rev. C) 2013年 5月 1日
Application note Power Supply Design Considerations for Modern FPGAs (Power Designer 121) 2010年 2月 2日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

LM3880EVAL — 電源序列器

The LM3880 evaluation board has been designed to connect directly to the power supplies of an existing system to enable sequencing. Upon enabling the device, the three open drain output flags will rise in sequential order, 1-2-3. Once the part is disabled, the shutdown sequence will occur in (...)

使用指南: PDF
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模擬型號

LM3880 PSpice Transient Model

SNVMBB4.ZIP (45 KB) - PSpice Model
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
要求
參考設計

PMP10711 — 適用於多軌輸出的簡單六通道電源排序參考設計

PMP10711 is a 6-channel power supply sequencer that utilizes two LM3880 3-channel sequencer ICs. The design uses an external AND gate and OR gate to power up and power down all 6 channels in sequential fashion. This is useful in cases when up to 6 power rails need to be sequenced during power up (...)
Test report: PDF
電路圖: PDF
參考設計

TIDA-010009 — 適用於伺服驅動器的小巧高效 24-V 輸入輔助電源供應參考設計

This reference design showcases a method to generate power supplies required in a servo or AC drive including the analog and digtal I/O interfaces, encoder supply, isolated transceivers and digital processing block. This design also implements protection against input reverse polarity, output (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-010034 — IEEE802.3at Type-1 PoE 和 12V 適配器輸入到 IP 網路攝影機的負載點參考設計

Power over Ethernet (PoE) enables power to be delivered over the same ethernet cable as data with no danger of cross-talk, interference, or corruption of the data streams. This reference design showcases end-to-end power tree for an IP network camera powered using PoE or 12-V adapter based on the (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-010011 — 用於保護繼電器處理器模組的高效電源供應架構參考設計

This reference design showcases various power architectures for generating multiple voltage rails for an application processor module, requiring >1A load current and high efficiency . The required power supply is generated using 5-, 12- or 24-V DC input from the backplane. Power supplies are (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01416 — 適用於 NXP™ iMX7 系列應用處理器的小型高效靈活電源供應參考設計

This small, efficient and flexible power supply for NXP™ IMX7 series application processors reference design was designed for iMX7 processors. This design uses five DC/DC converters and one sequencer IC to power the iMX7. It supports numerous industrial applications and any (...)
Design guide: PDF
電路圖: PDF
參考設計

PMP10600 — Xilinx® Zynq® 7000 系列 (XC7Z015) 電源解決方案 (5W) 參考設計

The PMP10600.1 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA.   This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator.  It also features one LM3880 for power up and power (...)
Test report: PDF
電路圖: PDF
參考設計

PMP10601 — Xilinx® Zynq® 7000 系列 (XC7Z015) 電源解決方案 (8W) 參考設計

The PMP10601 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015)  FPGA.   This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA.  It also (...)
Test report: PDF
電路圖: PDF
參考設計

PMP10652 — 具備所有必要汽車防護之 30W ADAS 系統的系統級參考設計

PMP10652 is a System optimized (CISPR 25 Class 3) 30W design for Surround View ADAS system.

The design has various protections such as Load dump through TVS (ISO pulse testing), Reverse Voltage (Innovative Smart diode with very low Iq), Battery Disconnect Switch with OVP protection (PFET) and is EMI (...)

Test report: PDF
電路圖: PDF
參考設計

PMP10630 — Xilinx Kintex UltraScale XCKU040 FPGA 電源解決方案、6W 參考設計

The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 (...)
Test report: PDF
電路圖: PDF
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