LP2985A

現行

具高準確度的 150-mA 16-V 低壓降 (LDO) 電壓穩壓器

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LP2985 現行 具啟用功能的 150-mA、16-V、低壓差電壓穩壓器 Different orderable name
引腳對引腳的功能與所比較的產品相同
TPS7A24 現行 具啟用功能的 200mA、18V、超低 IQ 低壓差 (LDO) 電壓穩壓器 Ultra-low-IQ (2 µA)

產品詳細資料

Output options Fixed Output Iout (max) (A) 0.15 Vin (max) (V) 16 Vin (min) (V) 2.2 Vout (max) (V) 10 Vout (min) (V) 1.8 Fixed output options (V) 1.8, 2.5, 2.8, 2.9, 3, 3.3, 5, 10 Noise (µVrms) 30 Iq (typ) (mA) 0.065 Thermal resistance θJA (°C/W) 206 Rating Catalog Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable Accuracy (%) 3 PSRR at 100 KHz (dB) 40 Dropout voltage (Vdo) (typ) (mV) 280 Operating temperature range (°C) -45 to 125
Output options Fixed Output Iout (max) (A) 0.15 Vin (max) (V) 16 Vin (min) (V) 2.2 Vout (max) (V) 10 Vout (min) (V) 1.8 Fixed output options (V) 1.8, 2.5, 2.8, 2.9, 3, 3.3, 5, 10 Noise (µVrms) 30 Iq (typ) (mA) 0.065 Thermal resistance θJA (°C/W) 206 Rating Catalog Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Features Enable Accuracy (%) 3 PSRR at 100 KHz (dB) 40 Dropout voltage (Vdo) (typ) (mV) 280 Operating temperature range (°C) -45 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • V IN range (new chip): 2.5 V to 16 V
  • V OUT range (new chip):
    • 1.2 V to 5.0 V (fixed, 100-mV steps)
  • V OUT accuracy:
    • ±1% for A-grade legacy chip
    • ±1.5% for standard-grade legacy chip
    • ±0.5% for new chip only
  • ±1% output accuracy over load, and temperature for new chip
  • Output current: Up to 150 mA
  • Low I Q (new chip): 71 µA at I LOAD = 0 mA
  • Low I Q (new chip): 750 µA at I LOAD = 150 mA
  • Shutdown current:
    • 0.01 µA (typ) for legacy chip
    • 1.12 µA (typ) for new chip
  • Low noise: 30 µV RMS with 10-nF bypass capacitor
  • Output current limiting and thermal protection
  • Stable with 2.2-µF ceramic capacitors
  • High PSRR: 70 dB at 1 kHz, 40 dB at 1 MHz
  • Operating junction temperature: –40°C to +125°C
  • Package: 5-pin SOT-23 (DBV)
  • V IN range (new chip): 2.5 V to 16 V
  • V OUT range (new chip):
    • 1.2 V to 5.0 V (fixed, 100-mV steps)
  • V OUT accuracy:
    • ±1% for A-grade legacy chip
    • ±1.5% for standard-grade legacy chip
    • ±0.5% for new chip only
  • ±1% output accuracy over load, and temperature for new chip
  • Output current: Up to 150 mA
  • Low I Q (new chip): 71 µA at I LOAD = 0 mA
  • Low I Q (new chip): 750 µA at I LOAD = 150 mA
  • Shutdown current:
    • 0.01 µA (typ) for legacy chip
    • 1.12 µA (typ) for new chip
  • Low noise: 30 µV RMS with 10-nF bypass capacitor
  • Output current limiting and thermal protection
  • Stable with 2.2-µF ceramic capacitors
  • High PSRR: 70 dB at 1 kHz, 40 dB at 1 MHz
  • Operating junction temperature: –40°C to +125°C
  • Package: 5-pin SOT-23 (DBV)

The LP2985 is a fixed-output, wide-input, low-noise, low-dropout voltage regulator supporting an input voltage range from 2.5 V to 16 V and up to 150 mA of load current. The LP2985 supports an output range of 1.2 V to 5.0 V (for new chip).

Additionally, the LP2985 (new chip) has a 1% output accuracy across load, and temperature that can meet the needs of low-voltage microcontrollers (MCUs) and processors.

Low output noise of 30 µV RMS (with 10-nF bypass capacitors) and wide bandwidth PSRR performance of greater than 70 dB at 1 kHz and 40 dB at 1 MHz help attenuate the switching frequency of an upstream DC/DC converter and minimize post regulator filtering.

The internal soft-start time and current limit protection reduce inrush current during start up, thus minimizing input capacitance. Standard protection features, such as overcurrent and overtemperature protection, are included.

The LP2985 is available in a 5-pin 2.9-mm × 1.6-mm SOT-23 (DBV) package.

The LP2985 is a fixed-output, wide-input, low-noise, low-dropout voltage regulator supporting an input voltage range from 2.5 V to 16 V and up to 150 mA of load current. The LP2985 supports an output range of 1.2 V to 5.0 V (for new chip).

Additionally, the LP2985 (new chip) has a 1% output accuracy across load, and temperature that can meet the needs of low-voltage microcontrollers (MCUs) and processors.

Low output noise of 30 µV RMS (with 10-nF bypass capacitors) and wide bandwidth PSRR performance of greater than 70 dB at 1 kHz and 40 dB at 1 MHz help attenuate the switching frequency of an upstream DC/DC converter and minimize post regulator filtering.

The internal soft-start time and current limit protection reduce inrush current during start up, thus minimizing input capacitance. Standard protection features, such as overcurrent and overtemperature protection, are included.

The LP2985 is available in a 5-pin 2.9-mm × 1.6-mm SOT-23 (DBV) package.

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* Data sheet LP2985 150-mA, Low-Noise, Low-Dropout Regulator With Shutdown datasheet (Rev. R) PDF | HTML 2023年 7月 10日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

LP2985-10 PSpice Transient Model

SLVMA21.ZIP (20 KB) - PSpice Model
模擬型號

LP2985-10 Unencrypted PSpice Transient Model

SNVMB87.ZIP (1 KB) - PSpice Model
模擬型號

LP2985-18 PSpice Transient Model

SLVMA17.ZIP (20 KB) - PSpice Model
模擬型號

LP2985-18 Unencrypted PSpice Transient Model

SNVMB86.ZIP (1 KB) - PSpice Model
模擬型號

LP2985-25 PSpice Transient Model

SLVMA22.ZIP (20 KB) - PSpice Model
模擬型號

LP2985-25 Unencrypted PSpice Transient Model

SNVMB91.ZIP (1 KB) - PSpice Model
模擬型號

LP2985-28 PSpice Transient Model

SLVMA20.ZIP (20 KB) - PSpice Model
模擬型號

LP2985-28 Unencrypted PSpice Transient Model

SNVMB93.ZIP (1 KB) - PSpice Model
模擬型號

LP2985-29 PSpice Transient Model

SLVMA18.ZIP (20 KB) - PSpice Model
模擬型號

LP2985-29 Unencrypted PSpice Transient Model

SNVMB90.ZIP (1 KB) - PSpice Model
模擬型號

LP2985-30 PSpice Transient Model

SLVMA23.ZIP (20 KB) - PSpice Model
模擬型號

LP2985-30 Unencrypted PSpice Transient Model

SNVMB88.ZIP (1 KB) - PSpice Model
模擬型號

LP2985-33 PSpice Transient Model

SLVMA24.ZIP (20 KB) - PSpice Model
模擬型號

LP2985-33 Unencrypted PSpice Transient Model

SNVMB89.ZIP (1 KB) - PSpice Model
模擬型號

LP2985-50 PSpice Transient Model

SLVMA19.ZIP (20 KB) - PSpice Model
模擬型號

LP2985-50 Unencrypted PSpice Transient Model

SNVMB92.ZIP (1 KB) - PSpice Model
參考設計

PMP23332 — 交錯式和多相反相降壓-升壓轉換器參考設計

此參考設計運用 UCD3138064A 做為數位控制器,使用支援雙相峰值電流模式控制的能力來控制反相降壓升壓。此設計採用軟切換技術提升電源效率。輸入電壓範圍為 -62 V 至 -36 V。輸出電壓範圍可在 28 V 至 52 V 之間調整。預設輸出電壓為 48-V,最大電流為 14 A。
Test report: PDF
封裝 引腳 下載
SOT-23 (DBV) 5 檢視選項

訂購與品質

內含資訊:
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  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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