產品詳細資料

Technology family LSF Applications GPIO Bits (#) 1 Data rate (max) (Mbps) 200 High input voltage (min) (V) 0.95 High input voltage (max) (V) 5 Vout (min) (V) 0.95 Vout (max) (V) 5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 12.5 Features Output enable Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LSF Applications GPIO Bits (#) 1 Data rate (max) (Mbps) 200 High input voltage (min) (V) 0.95 High input voltage (max) (V) 5 Vout (min) (V) 0.95 Vout (max) (V) 5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 12.5 Features Output enable Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 125
USON (DRY) 6 1.45 mm² 1.45 x 1 X2SON (DTQ) 6 0.8 mm² 1 x 0.8
  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up To 40-MHz up or down translation at 50 pF capacitive load
  • Allows bidirectional voltage-level translation between
    • 0.95 V ↔ 1.8/2.5/3.3/5 V
    • 1.2 V ↔ 1.8/2.5/3.3/5 V
    • 1.8 V ↔ 2.5/3.3/5 V
    • 2.5 V ↔ 3.3/5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low R ON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100 mA per JESD 17
  • –40°C to 125°C operating temperature range
  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up To 40-MHz up or down translation at 50 pF capacitive load
  • Allows bidirectional voltage-level translation between
    • 0.95 V ↔ 1.8/2.5/3.3/5 V
    • 1.2 V ↔ 1.8/2.5/3.3/5 V
    • 1.8 V ↔ 2.5/3.3/5 V
    • 2.5 V ↔ 3.3/5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low R ON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100 mA per JESD 17
  • –40°C to 125°C operating temperature range

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I 2C, SMBus, and so forth). The LSF family of devices supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up to 40-MHz up or down translation at 50 pF capacitive load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels which makes it very flexible.

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I 2C, SMBus, and so forth). The LSF family of devices supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up to 40-MHz up or down translation at 50 pF capacitive load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels which makes it very flexible.

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類型 標題 日期
* Data sheet LSF0101 1-Channel Auto-Bidirectional Multi-Voltage Level Translatorfor Open-Drain and Push-Pull Applications datasheet PDF | HTML 2023年 6月 8日
Application brief Integrated vs. Discrete Open Drain Level Translation PDF | HTML 2024年 1月 9日
Application brief Enabling Smart Battery Energy Storage Systems with Voltage Level Translation PDF | HTML 2023年 6月 4日
Selection guide Voltage Translation Buying Guide (Rev. A) 2021年 4月 15日
Application note Factors Affecting VOL for TXS and LSF Auto-bidirectional Translation Devices 2017年 11月 19日
Application note Biasing Requirements for TXS, TXB, and LSF Auto-Bidirectional Translators 2017年 10月 30日
EVM User's guide LSF-EVM Hardware User's Guide 2017年 7月 5日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
EVM User's guide LSF010X Evaluation Module User's Guide (Rev. A) 2015年 6月 29日
Application note Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) 2015年 4月 30日
Application note Voltage-Level Translation With the LSF Family (Rev. B) 2015年 3月 12日
Application note Selecting the Right Level Translation Solution (Rev. A) 2004年 6月 22日

設計與開發

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開發板

LSF-EVM — 1 至 8 位元 LSF 轉換器系列評估模組

The LSF family of devices are level translators that support a voltage range of 0.95V and 5V and provide multi-voltage bidirectional translation without a direction pin.

The LSF-EVM comes populated with the LSF0108PWR device and has landing patterns that are compatible with the LSF0101DRYR, (...)

使用指南: PDF
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模擬型號

LSF0101 IBIS Model

SDLM021.ZIP (55 KB) - IBIS Model
模擬型號

LSF0101 PSPICE Transient Model

SDLM024.ZIP (114 KB) - PSpice Model
參考設計

PMP21939 — 用於汽車無線數據通訊系統控制單元的四輸出同步降壓參考設計

This reference design uses an LM63635-Q1 synchronous buck converter to output either a 3.3-V or 5-V rail. The bus converter switches at 2.1 MHz, and the load converters (TPS62810-Q1) switch at 2.2 MHz. The system is designed for telematics control unit power. Easily configurable jumpers allow (...)
Test report: PDF
電路圖: PDF
封裝 引腳 下載
USON (DRY) 6 檢視選項
X2SON (DTQ) 6 檢視選項

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