PCM5121
- Register-Selectable Audio-Processing Functions up to 48-kHz fS
- Dynamic Range Control (DRC)
- Equalization (EQ)
- Filtering
- DAC Functionality to 384-kHz fS
- Market-Leading Low Out-of-Band Noise
- Selectable Digital-Filter Latency and Performance
- No DC-Blocking Capacitors Required
- Integrated Negative Charge Pump
- Intelligent Muting System; Soft Up or Down Ramp and Analog Mute for 120-dB Mute SNR
- Integrated High-Performance Audio PLL With BCK Reference to Generate SCK Internally
- Accepts 16-, 20-, 24-, and 32-Bit Audio Data
- PCM Data Formats: I2S, Left-Justified, Right-Justified, TDM / DSP
- SPI or I2C Control
- Software or Hardware Configuration
- Automatic Power-Save Mode When LRCK and BCK are Deactivated
- 1.8-V or 3.3-V Failsafe LVCMOS Digital Inputs
- Single Supply Operation:
- 3.3-V Analog, 1.8-V or 3.3-V Digital
- Integrated Power-On Reset
- Small28-Pin Package
The PCM512x devices are a family of monolithic CMOS-integrated circuits that include a stereo digital-to-analog converter and additional support circuitry in a small TSSOP package. The PCM512x uses the latest generation of TI’s advanced segment-DAC architecture to achieve excellent dynamic performance and improved tolerance to clock jitter.
Members of the PCM512x family integrate preset audio processing functions with programmable coefficients, allowing developers to change the characteristics of the interpolation filter, speaker EQ, dynamic range controls, and average volume control in their products.
The PCM512x provides 2.1-VRMS ground-centered outputs, allowing designers to eliminate DC-blocking capacitors on the output, as well as external muting circuits traditionally associated with single supply line drivers.
The integrated line driver surpasses all other charge-pump-based line drivers by supporting loads down to 1 kΩ. By supporting loads down to 1 kΩ, the PCM512x can essentially drive up to 10 products in parallel (LCD TV, DVDR, AV receivers, and so forth).
The integrated PLL on the device removes the requirement for a system clock (commonly known as master clock), allowing a 3-wire I2S connection, along with reducing system EMI.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | PCM512x 2-VRMS DirectPath™, 112-dB and 106-dB Audio Stereo DACs With 32-Bit, 384-kHz PCM Interface datasheet (Rev. C) | PDF | HTML | 2018年 10月 25日 |
EVM User's guide | PCM512x/4x EVM User's Guide (Rev. A) | 2014年 11月 3日 | ||
Application note | A Low Noise, Low Distortion Design for Antialiasing and Anti-Imaging Filters | 2000年 9月 27日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 引腳 | 下載 |
---|---|---|
TSSOP (PW) | 28 | 檢視選項 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。