SN54HC373-DIE

Name: SN54HC373-DIE
Brand: TI
SKU: SN54HC373-DIE
Price: 73.44 USD

現行

具 3 態輸出的八透明 D 型閂鎖

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產品規格表

document-pdfAcrobat Octal Transparent D-Type Latch With 3-State Outputs, SN54HC373-DIE datasheet (英文)

SN54HC373-DIE

現行

產品規格表

立即訂購

產品詳細資料

Number of channels

8

Technology family

HC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Operating temperature range (°C)

25 to 25

Rating

Space

Number of channels

8

Technology family

HC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Operating temperature range (°C)

25 to 25

Rating

Space

DIESALE (TD)

—

See data sheet

Wide Operating Voltage Range
High-Current 3-State True Outputs Can
Drive Up To 15 LSTTL Loads
Low Power Consumption
Typical t_pd = 13 ns
Low Input Current
Full Parallel Access for Loading

Wide Operating Voltage Range
High-Current 3-State True Outputs Can
Drive Up To 15 LSTTL Loads
Low Power Consumption
Typical t_pd = 13 ns
Low Input Current
Full Parallel Access for Loading

This 8-bit latch features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches of the SN54HC373-DIE are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs.

This 8-bit latch features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches of the SN54HC373-DIE are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs.

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	類型	標題		日期
*	Data sheet	Octal Transparent D-Type Latch With 3-State Outputs, SN54HC373-DIE datasheet		2013年 5月 10日
	Application note	Power-Up Behavior of Clocked Devices (Rev. B)	PDF \| HTML	2022年 12月 15日
	Selection guide	TI Space Products (Rev. I)		2022年 3月 3日
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		2021年 7月 26日
	Selection guide	Logic Guide (Rev. AB)		2017年 6月 12日
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015年 12月 2日
	User guide	LOGIC Pocket Data Book (Rev. B)		2007年 1月 16日
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		2004年 7月 8日
	User guide	Signal Switch Data Book (Rev. A)		2003年 11月 14日
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		2002年 8月 29日
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)		1997年 6月 1日
	Application note	Designing With Logic (Rev. C)		1997年 6月 1日
	Application note	Input and Output Characteristics of Digital Integrated Circuits		1996年 10月 1日
	Application note	Live Insertion		1996年 10月 1日
	Application note	SN54/74HCT CMOS Logic Family Applications and Restrictions		1996年 5月 1日
	Application note	Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc		1996年 4月 1日

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SN54HC373-DIE

具 3 態輸出的八透明 D 型閂鎖

SN54HC373-DIE

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