SN55HVD233-SEP
- VID V62/18617
- Radiation Hardened
- Single Event Latch-up (SEL) Immune to 43 MeV-cm2/mg at 125°C
- ELDRS Free to 30 krad(Si)
- Total Ionizing Dose (TID) RLAT for Every Wafer Lot up to 20 krad(Si)
- Space Enhanced Plastic
- Controlled Baseline
- Gold Wire
- NiPdAu Lead Finish
- One Assembly and Test Site
- One Fabrication Site
- Available in Military (–55°C to 125°C) Temperature Range
- Extended Product Life Cycle
- Extended Product-Change Notification
- Product Traceability
- Enhanced Mold Compound for Low Outgassing
- Compatible With ISO 11898-2
- Bus Pins Fault Protection Exceeds ±16 V
- Bus Pins ESD Protection Exceeds ±14-kV HBM
- Data Rates up to 1 Mbps
- Extended –7-V to 12-V Common Mode Range
- High-Input Impedance Allows for 120 Nodes
- LVTTL I/Os are 5-V Tolerant
- Adjustable Driver Transition Times for Improved Signal Quality
- Unpowered Node Does Not Disturb the Bus
- Low-Current Standby Mode, 200-µA Typical
- Loopback for Diagnostic Functions
- Thermal Shutdown Protection
- Power Up and Power Down With Glitch-Free Bus Inputs and Outputs
- High-Input Impedance With Low VCC
- Monolithic Output During Power Cycling
The SN55HVD233-SEP is used in applications employing the controller area network (CAN) serial communication physical layer in accordance with the ISO 11898 standard. As a CAN transceiver, the device provides transmit and receive capability between the differential CAN bus and a CAN controller, with signaling rates up to 1 Mbps.
Designed for operation in especially harsh radiation environments, the SN55HVD233-SEP features cross-wire, overvoltage, loss of ground protection to ±16 V, and overtemperature (thermal shutdown) protection. This device operates over a wide –7-V to 12-V common mode range. This transceiver is the interface between the host CAN controller on the microprocessor, FPGA, or ASIC, and the differential CAN bus used in satellite applications.
Modes: The RS, pin 8 of the SN55HVD233-SEP, provides for three modes of operation: high-speed, slope control, or low-power standby mode. The user selects the high-speed mode of operation by connecting pin 8 directly to ground, allowing the driver output transistors to switch on and off as fast as possible with no limitation on the rise and fall slope. The user can adjust the rise and fall slope by connecting a resistor to ground at pin 8, because the slope is proportional to the pins output current. Slope control is implemented with a resistor value of 0 Ω to achieve a single ended slew rate of approximately 38 V/µs, and up to a value of 50 kΩ to achieve approximately 4-V/µs slew rate. For more information about slope control, refer to the Application and Implementation section.
The SN55HVD233-SEP enters a low-current standby (listen-only) mode during which the driver is switched off and the receiver remains active if a high logic level is applied to pin 8. The local protocol controller reverses this low-current standby mode when it needs to transmit to the bus. For more information on the loopback mode, refer to the Application Information section.
Loopback: A logic high on the loopback LBK pin 5 of the SN55HVD233-SEP places the bus output and bus input in a high-impedance state. The remaining circuit remains active and available for driver-to-receiver loopback, self-diagnostic node functions without disturbing the bus.
CAN bus states: The CAN bus has two states during powered operation of the device: dominant and recessive. A dominant bus state is when the bus is driven differentially, corresponding to a logic low on the D and R pin. A recessive bus state is when the bus is biased to VCC / 2 through the high-resistance internal input resistors RIN of the receiver, corresponding to a logic high on the D and R pins (see Bus States (Physical Bit Representation) and Simplified Recessive Common Mode Bias and Receiver).
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