SN55LVDS31
- Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard
- Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and 100-Ω Load
- Typical Output Voltage Rise and Fall Times of 500 ps (400 Mbps)
- Typical Propagation Delay Times of 1.7 ns
- Operate From a Single 3.3-V Supply
- Power Dissipation 25 mW Typical Per Driver at 200 MHz
- Driver at High-Impedance When Disabled or With VCC = 0
- Bus-Terminal ESD Protection Exceeds 8 kV
- Low-Voltage TTL (LVTTL) Logic Input Levels
- Pin Compatible With AM26LS31, MC3487, and µA9638
- Cold Sparing for Space and High-Reliability Applications Requiring Redundancy
The SN55LVDS31, SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 devices are differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100-Ω load when enabled.
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檢視所有 3 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | SNx5LVDSxx High-Speed Differential Line Drivers datasheet (Rev. N) | PDF | HTML | 2021年 1月 21日 |
| * | SMD | SN55LVDS31 SMD 5962-97621 | 2016年 6月 21日 | |
| More literature | Quad High-Speed LVDS Differential Drivers And Receivers | 1999年 1月 25日 |
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使用指南: PDF
| 封裝 | 引腳 | 下載 |
|---|---|---|
| CDIP (J) | 16 | 檢視選項 |
| CFP (W) | 16 | 檢視選項 |
| LCCC (FK) | 20 | 檢視選項 |
訂購與品質
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