SN65LVDS9638

現行

1500-Mbps LVDS 轉盤高速差分驅動器

產品詳細資料

Function Driver Protocols LVDS Number of transmitters 2 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver Protocols LVDS Number of transmitters 2 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVTTL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
HVSSOP (DGN) 8 14.7 mm² 3 x 4.9 SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard
  • Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and 100-Ω Load
  • Typical Output Voltage Rise and Fall Times of 500 ps (400 Mbps)
  • Typical Propagation Delay Times of 1.7 ns
  • Operate From a Single 3.3-V Supply
  • Power Dissipation 25 mW Typical Per Driver at 200 MHz
  • Driver at High-Impedance When Disabled or With VCC = 0
  • Bus-Terminal ESD Protection Exceeds 8 kV
  • Low-Voltage TTL (LVTTL) Logic Input Levels
  • Pin Compatible With AM26LS31, MC3487, and µA9638
  • Cold Sparing for Space and High-Reliability Applications Requiring Redundancy
  • Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard
  • Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and 100-Ω Load
  • Typical Output Voltage Rise and Fall Times of 500 ps (400 Mbps)
  • Typical Propagation Delay Times of 1.7 ns
  • Operate From a Single 3.3-V Supply
  • Power Dissipation 25 mW Typical Per Driver at 200 MHz
  • Driver at High-Impedance When Disabled or With VCC = 0
  • Bus-Terminal ESD Protection Exceeds 8 kV
  • Low-Voltage TTL (LVTTL) Logic Input Levels
  • Pin Compatible With AM26LS31, MC3487, and µA9638
  • Cold Sparing for Space and High-Reliability Applications Requiring Redundancy

The SN55LVDS31, SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 devices are differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100-Ω load when enabled.

The SN55LVDS31, SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 devices are differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100-Ω load when enabled.

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類型 標題 日期
* Data sheet SNx5LVDSxx High-Speed Differential Line Drivers datasheet (Rev. N) PDF | HTML 2021年 1月 21日
Application brief LVDS to Improve EMC in Motor Drives 2018年 9月 27日
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018年 8月 3日
Application brief How to Terminate LVDS Connections with DC and AC Coupling 2018年 5月 16日
Application note An Overview of LVDS Technology 1998年 10月 5日

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模擬型號

SN65LVDS9638 IBIS Model (Rev. A)

SLLC019A.ZIP (6 KB) - IBIS Model
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使用指南: PDF
封裝 引腳 下載
HVSSOP (DGN) 8 檢視選項
SOIC (D) 8 檢視選項
VSSOP (DGK) 8 檢視選項

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