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LVDS、M-LVDS 和 PECL IC

SN65LVDT41

現行

適用於透過 LVDS 的 SPI 的多通道收發器

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產品規格表

SN65LVDT41

現行
產品規格表 立即訂購

產品詳細資料

Function Transceiver Protocols LVDS Number of transmitters 4 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (MBits) 250 Input signal LVDS, LVTTL Output signal LVDS, LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols LVDS Number of transmitters 4 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (MBits) 250 Input signal LVDS, LVTTL Output signal LVDS, LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Integrated 110-Ω nominal receiver line termination resistor
  • Single 3.3-V power supply (3-V to 3.6-V range)
  • Supports signaling rates of at least 250 Mbps
  • Flow-through pinout simplifies PCB layout
  • LVTTL-compatible logic I/Os
  • ESD protection on bus pins exceeds 16 kV
  • Meets or exceeds the requirements of ANSI/TIA/EIA-644A standard for LVDS
  • 20-pin PW thin shrink small-outline package with 26-mil terminal pitch
  • Integrated 110-Ω nominal receiver line termination resistor
  • Single 3.3-V power supply (3-V to 3.6-V range)
  • Supports signaling rates of at least 250 Mbps
  • Flow-through pinout simplifies PCB layout
  • LVTTL-compatible logic I/Os
  • ESD protection on bus pins exceeds 16 kV
  • Meets or exceeds the requirements of ANSI/TIA/EIA-644A standard for LVDS
  • 20-pin PW thin shrink small-outline package with 26-mil terminal pitch

The SN65LVDTxx devices are multi-channel LVDS transceivers that operate using LVDS line drivers and receivers. The SN65LVDTxx devices support signaling rates of at least 250 Mbps, and the devices operate from a single supply (typically at 3.3 V) in a 20-pin TSSOP package designed for easy PCB layout.

The SN65LVDT14 and SN65LVDT41 provide general-purpose, asymmetric, bidirectional communication with the added benefit of high noise immunity, low electromagnetic interference (EMI), and increased cable length through the use of LVDS lines. The SN65LVDT14 and SN65LVDT41 are primarily used for SPI over LVDS applications.

The SN65LVDT14 combines one LVDS line driver with four terminated LVDS line receivers in one package. The SN65LVDT14 can be used to extend asymmetric, bidirectional interfaces such as SPI over long distances, and should be located at the SPI slave.

The SN65LVDT41 combines four LVDS line drivers with a single terminated LVDS line receiver in one package. The SN65LVDT41 can be used to extend asymmetric, bidirectional interfaces such as SPI over long distances, and should be located at the SPI master.

The SN65LVDTxx devices are multi-channel LVDS transceivers that operate using LVDS line drivers and receivers. The SN65LVDTxx devices support signaling rates of at least 250 Mbps, and the devices operate from a single supply (typically at 3.3 V) in a 20-pin TSSOP package designed for easy PCB layout.

The SN65LVDT14 and SN65LVDT41 provide general-purpose, asymmetric, bidirectional communication with the added benefit of high noise immunity, low electromagnetic interference (EMI), and increased cable length through the use of LVDS lines. The SN65LVDT14 and SN65LVDT41 are primarily used for SPI over LVDS applications.

The SN65LVDT14 combines one LVDS line driver with four terminated LVDS line receivers in one package. The SN65LVDT14 can be used to extend asymmetric, bidirectional interfaces such as SPI over long distances, and should be located at the SPI slave.

The SN65LVDT41 combines four LVDS line drivers with a single terminated LVDS line receiver in one package. The SN65LVDT41 can be used to extend asymmetric, bidirectional interfaces such as SPI over long distances, and should be located at the SPI master.
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技術文件

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類型 標題 日期
* Data sheet SN65LVDTxx multi-channel LVDS transceivers SN65LVDT14—One LVDS driver plus four LVDS receivers SN65LVDT41—Four LVDS drivers plus one LVDS receiver datasheet (Rev. C) PDF | HTML 2019年 2月 7日
Application brief LVDS to Improve EMC in Motor Drives 2018年 9月 27日
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018年 8月 3日
Application brief How to Terminate LVDS Connections with DC and AC Coupling 2018年 5月 16日

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模擬型號

SN65LVDT41 IBIS Model

SLLC120.ZIP (7 KB) - IBIS Model
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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