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LVDS、M-LVDS 和 PECL IC

SN65MLVD204A

現行

半雙工 M-LVDS 收發器

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產品規格表

SN65MLVD204A

現行
產品規格表 立即訂購

產品詳細資料

Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (MBits) 100 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (MBits) 100 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Low-Voltage Differential 30-Ω to 55-Ω Line Drivers
    and Receivers for Signaling Rates(1) up to
    100 Mbps, Clock Frequencies up to 50 MHz
  • Type-1 Receivers Incorporate 25 mV of
    Hysteresis (SN65MLVD200A, SN65MLVD202A)
  • Type-2 Receivers Provide an Offset (100 mV)
    Threshold to Detect Open-Circuit and Idle-Bus
    Conditions (SN65MLVD204A, SN65MLVD205A)
  • Meets or Exceeds the M-LVDS Standard
    TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times
    for Improved Signal Quality
  • –1 V to 3.4 V of Common-Mode Voltage Range
    Allows Data Transfer With 2 V of Ground Noise
  • Bus Pins High Impedance When Disabled
    or VCC ≤ 1.5 V
  • 200-Mbps Devices Available (SN65MLVD201,
    SN65MLVD203, SN65MLVD206, SN65MLVD207)
  • Bus Pin ESD Protection Exceeds 8 kV
  • Packages Available:
    • 8-Pin SOIC
      SN65MLVD200A, SN65MLVD204A
    • 14-Pin SOIC
      SN65MLVD202A, SN65MLVD205A
  • Improved Alternatives to the SN65MLVD200,
    SN65MLVD202A, SN65MLVD204A, and
    SN65MLVD205A Devices
  • Low-Voltage Differential 30-Ω to 55-Ω Line Drivers
    and Receivers for Signaling Rates(1) up to
    100 Mbps, Clock Frequencies up to 50 MHz
  • Type-1 Receivers Incorporate 25 mV of
    Hysteresis (SN65MLVD200A, SN65MLVD202A)
  • Type-2 Receivers Provide an Offset (100 mV)
    Threshold to Detect Open-Circuit and Idle-Bus
    Conditions (SN65MLVD204A, SN65MLVD205A)
  • Meets or Exceeds the M-LVDS Standard
    TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times
    for Improved Signal Quality
  • –1 V to 3.4 V of Common-Mode Voltage Range
    Allows Data Transfer With 2 V of Ground Noise
  • Bus Pins High Impedance When Disabled
    or VCC ≤ 1.5 V
  • 200-Mbps Devices Available (SN65MLVD201,
    SN65MLVD203, SN65MLVD206, SN65MLVD207)
  • Bus Pin ESD Protection Exceeds 8 kV
  • Packages Available:
    • 8-Pin SOIC
      SN65MLVD200A, SN65MLVD204A
    • 14-Pin SOIC
      SN65MLVD202A, SN65MLVD205A
  • Improved Alternatives to the SN65MLVD200,
    SN65MLVD202A, SN65MLVD204A, and
    SN65MLVD205A Devices

The SN65MLVD20xx devices are multipoint low-voltage differential (M-LVDS) line drivers and receivers that are optimized to operate at signaling rates up to 100 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899.

The SN65MLVD20xx devices have enhancements over their predecessors. Improved features include controlled slew rate on the driver output to help minimize reflections from unterminated stubs, which results in better signal integrity. Additionally, 8-kV ESD protection on the bus pins for more robustness. The same footprint definition was maintained making for an easy drop-in replacement for a system performance upgrade.

The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD20xx devices are multipoint low-voltage differential (M-LVDS) line drivers and receivers that are optimized to operate at signaling rates up to 100 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899.

The SN65MLVD20xx devices have enhancements over their predecessors. Improved features include controlled slew rate on the driver output to help minimize reflections from unterminated stubs, which results in better signal integrity. Additionally, 8-kV ESD protection on the bus pins for more robustness. The same footprint definition was maintained making for an easy drop-in replacement for a system performance upgrade.

The devices are characterized for operation from –40°C to 85°C.
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類型 標題 日期
* Data sheet SN65MLVD20xx Multipoint-LVDS Line Driver and Receiver datasheet (Rev. D) PDF | HTML 2015年 10月 28日
Application note An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. C) PDF | HTML 2023年 6月 22日
Application brief How Far, How Fast Can You Operate MLVDS? 2018年 8月 6日
Application note SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 2001年 11月 20日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

MLVD20XBEVM — SN65MLVD203B 和 SN65MLVD204B 全雙工和半雙工多點 LVDS (M-LVDS) 評估模組

使用指南: PDF
TI.com 無法提供
開發板

MLVD20XEVM — M-LVDS 評估模組

This evaluation module is for the SN65MLVD203B and SN65MLVD204B, which are M-LVDS transceivers.
The SN65MLVD203B is a full-duplex transceiver, and the SN65MLVD204B is a half-duplex transceiver.
使用指南: PDF
TI.com 無法提供
開發板

SN65MLVD2-3EVM — SN65MLVD2-3EVM 評估模組

The SN65MLVD2 and SN65MLVD3 are single-channel M-LVDS receivers. These devices are designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which are optimized to operate at signaling rates up to250 Mbps. Each receiver channel is controlled by a receive enable (/RE). When /RE = low, (...)

使用指南: PDF
TI.com 無法提供
模擬型號

SN65MLVD204A IBIS Model

SLLC186.ZIP (16 KB) - IBIS Model
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
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