SN74AHC16540

Name: SN74AHC16540
Brand: TI
SKU: SN74AHC16540
Price: 0.476 USD

現行

具有 3 態輸出的 16 通道 2-V 至 5.5-V 逆變器

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產品規格表

document-pdfAcrobat 16-Bit Buffers/Drivers With 3-State Outputs datasheet (Rev. F) (英文)

SN74AHC16540

現行

產品規格表

立即訂購

產品詳細資料

Technology family

AHC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

5.5

Number of channels

16

IOL (max) (mA)

8

IOH (max) (mA)

-8

Supply current (max) (µA)

40

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

AHC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

5.5

Number of channels

16

IOL (max) (mA)

8

IOH (max) (mA)

-8

Supply current (max) (µA)

40

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SSOP (DL)

48

164.358 mm² 15.88 x 10.35

TSSOP (DGG)

48

101.25 mm² 12.5 x 8.1

Members of the Texas Instruments Widebus^TM Family
EPIC^TM (Enhanced-Performance Implanted CMOS) Process
Operating Range 2-V to 5.5-V V_CC
Distributed V_CC and GND Pins Minimize High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB Layout
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), and Thin Very Small-Outline (DGV) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

Members of the Texas Instruments Widebus^TM Family
EPIC^TM (Enhanced-Performance Implanted CMOS) Process
Operating Range 2-V to 5.5-V V_CC
Distributed V_CC and GND Pins Minimize High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB Layout
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), and Thin Very Small-Outline (DGV) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

These 16-bit buffers and bus drivers provide a high-performance bus interface for wide data paths.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all corresponding outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54AHC16540 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AHC16540 is characterized for operation from -40°C to 85°C.

These 16-bit buffers and bus drivers provide a high-performance bus interface for wide data paths.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all corresponding outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54AHC16540 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AHC16540 is characterized for operation from -40°C to 85°C.

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	類型	標題	日期
*	Data sheet	16-Bit Buffers/Drivers With 3-State Outputs datasheet (Rev. F)	2000年 1月 25日
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)	2021年 7月 26日
	Selection guide	Little Logic Guide 2018 (Rev. G)	2018年 7月 6日
	Selection guide	Logic Guide (Rev. AB)	2017年 6月 12日
	Application note	How to Select Little Logic (Rev. A)	2016年 7月 26日
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	2015年 12月 2日
	User guide	LOGIC Pocket Data Book (Rev. B)	2007年 1月 16日
	Product overview	Design Summary for WCSP Little Logic (Rev. B)	2004年 11月 4日
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	2004年 7月 8日
	Application note	Selecting the Right Level Translation Solution (Rev. A)	2004年 6月 22日
	Application note	Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)	2002年 12月 2日
	Application note	Texas Instruments Little Logic Application Report	2002年 11月 1日
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	2002年 8月 29日
	Design guide	AHC/AHCT Designer's Guide February 2000 (Rev. D)	2000年 2月 24日
	Application note	Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)	1999年 9月 8日
	Product overview	Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)	1998年 4月 1日
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices	1997年 12月 1日
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)	1997年 8月 1日
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)	1997年 6月 1日
	Application note	Live Insertion	1996年 10月 1日