SN74CBTD3306C

Name: SN74CBTD3306C
Brand: TI
SKU: SN74CBTD3306C
Price: 0.325 USD

現行

具有 – 2-V 未達目標保護和電平移位變化 (低電位作動) 的 5-V、1:1 (SPST)、雙通道匯流排開關

立即訂購

產品規格表

document-pdfAcrobat SN74CBTD3306C datasheet (Rev. A) (英文)

SN74CBTD3306C

現行

產品規格表

立即訂購

產品詳細資料

Configuration

1:1 SPST

Number of channels

2

Power supply voltage - single (V)

5

Protocols

Analog

Ron (typ) (Ω)

3

CON (typ) (pF)

12.5

Bandwidth (MHz)

20

Operating temperature range (°C)

-40 to 85

Features

Undershoot protection

Input/output continuous current (max) (mA)

128

Rating

Catalog

Drain supply voltage (max) (V)

5.5

Supply voltage (max) (V)

5.5

Configuration

1:1 SPST

Number of channels

2

Power supply voltage - single (V)

5

Protocols

Analog

Ron (typ) (Ω)

3

CON (typ) (pF)

12.5

Bandwidth (MHz)

20

Operating temperature range (°C)

-40 to 85

Features

Undershoot protection

Input/output continuous current (max) (mA)

128

Rating

Catalog

Drain supply voltage (max) (V)

5.5

Supply voltage (max) (V)

5.5

SOIC (D)

8

29.4 mm² 4.9 x 6

TSSOP (PW)

8

19.2 mm² 3 x 6.4

Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
Integrated Diode to V_CC Provides 5-V Input Down To 3.3-V Output Level Shift
Bidirectional Data Flow, With Near-Zero Propagation Delay
Low ON-State Resistance (r_on) Characteristics (r_on = 3 Typical)
Low Input/Output Capacitance Minimizes Loading and Signal Distortion (C_io(OFF) = 5 pF Typical)
Data and Control Inputs Provide Undershoot Clamp Diodes
V_CC Operating Range From 4.5 V to 5.5 V
Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog Applications: USB Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
Integrated Diode to V_CC Provides 5-V Input Down To 3.3-V Output Level Shift
Bidirectional Data Flow, With Near-Zero Propagation Delay
Low ON-State Resistance (r_on) Characteristics (r_on = 3 Typical)
Low Input/Output Capacitance Minimizes Loading and Signal Distortion (C_io(OFF) = 5 pF Typical)
Data and Control Inputs Provide Undershoot Clamp Diodes
V_CC Operating Range From 4.5 V to 5.5 V
Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog Applications: USB Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

The SN74CBTD3306C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r_on), allowing for minimal propagation delay. This device features an integrated diode in series with V_CC to provide level shifting for 5-V input down to 3.3-V output levels. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBTD3306C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBTD3306C is organized as two 1-bit bus switches with separate output-enable (1OE\, 2OE\) inputs. It can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE\ is low, the associated 1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 1-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBTD3306C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r_on), allowing for minimal propagation delay. This device features an integrated diode in series with V_CC to provide level shifting for 5-V input down to 3.3-V output levels. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBTD3306C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBTD3306C is organized as two 1-bit bus switches with separate output-enable (1OE\, 2OE\) inputs. It can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE\ is low, the associated 1-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 1-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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檢視所有 13

	類型	標題		日期
*	Data sheet	SN74CBTD3306C datasheet (Rev. A)		2003年 10月 15日
	Application note	Selecting the Correct Texas Instruments Signal Switch (Rev. E)	PDF \| HTML	2022年 6月 2日
	Application note	Multiplexers and Signal Switches Glossary (Rev. B)	PDF \| HTML	2021年 12月 1日
	Application note	CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. C)	PDF \| HTML	2021年 11月 19日
	Application brief	Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C)	PDF \| HTML	2021年 1月 6日
	Selection guide	Little Logic Guide 2018 (Rev. G)		2018年 7月 6日
	Selection guide	Logic Guide (Rev. AB)		2017年 6月 12日
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015年 12月 2日
	User guide	LOGIC Pocket Data Book (Rev. B)		2007年 1月 16日
	More literature	Digital Bus Switch Selection Guide (Rev. A)		2004年 11月 10日
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		2004年 7月 8日
	User guide	Signal Switch Data Book (Rev. A)		2003年 11月 14日
	Application note	Bus FET Switch Solutions for Live Insertion Applications		2003年 2月 7日

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