SN74LV595B-EP
- 2 V to 5.5 V V CC operation
- Supports mixed-mode voltage operation on all ports
- I off supports partial-power-down mode operation
- Latch-up performance exceeds 250 mA per JESD 17
- Operating ambient temperature: -55°C to +125°C
- Supports defense, aerospace, and medical applications:
- Controlled baseline
- One assembly and test site
- One fabrication site
- Extended product life cycle
- Product traceability
The SN74LV595B-EP contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear ( SRCLR) input, serial (SER) input, and a serial output for cascading. When the output-enable ( OE) input is high, all outputs except Q H are in the high-impedance state.
The device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | SN74LV595B-EP Enhanced Product, 2-V to 5.5-V, Low-Noise, 8-bit Shift Register With3-State Outputs datasheet | PDF | HTML | 2023年 8月 31日 |
設計與開發
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14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組
14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
封裝 | 引腳 | 下載 |
---|---|---|
TSSOP (PW) | 16 | 檢視選項 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
- 組裝地點