TAD5212-Q1
- DAC performance:
- DAC to Line Out Dynamic Range: 119 dB
- DAC to HP Out Dynamic Range: 115 dB
- THD+N: –95 dB
- Head Phone/Line Out output voltage:
- Differential, 2-VRMS full-scale
- Single-ended, 1-VRMS full-scale
- DAC sample Rates (fs) = 8KHz to 768KHz
- Analog Input to Output By-pass
- Battery Protection
- Signal Distortion Limiter
- Thermal Foldback
- Low Latency Filter Selection
- Programmable HPF and Biquad Filters
- I2C & SPI Control Interface
- Audio Serial Interface
- Format: TDM, I2S or Left Justified
- Word Length: 16,20,24 or 32 Bits
- Programmable PLL for Flexible Clocking
- Low Power Modes
- TBD mW for Playback
- Single Supply Operation: 1.8V or 3.3V
- I/O Supply Operation: 1.2V or 1.8V or 3.3V
The TAD5212-Q1 is a high performance Stereo 2VRMS DAC. The TAD5212-Q1 supports both differential and Single Ended input and output. DAC Output can be configured for either Line Out or Head Phone Load. TAD5212-Q1 can drive upto TBD mW into a Headphone Load. The TAD5212-Q1 integrates programable channel gain, digital volume control, a low-jitter phase-locked loop (PLL), a programmable high-pass filter (HPF), programmable EQ and biquad filters, low-latency filter modes, and allows for sample rates up to 768 kHz. The TAD5212-Q1 supports Analog Input to Output Bypass option. Data from Analog-In and Digital-In can be mixed inside the device as well. The TAD5212-Q1 supports time-division multiplexing (TDM), I2S, or left-justified (LJ) audio formats, and can be controlled with I2C or SPI. These integrated high-performance features, along with a single supply operation, make TAD5212-Q1 an excellent choice for space-constrained audio applications.
技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TAD5212-Q1 High-performance stereo audio DAC with 119 dB dynamic range datasheet | PDF | HTML | 2022年 1月 14日 |
Application note | Headset Detection for TAx52xx Family | PDF | HTML | 2024年 4月 11日 | |
Application note | DAC Swings and Common Mode Settings in AC Coupled and DC Coupled DAC | PDF | HTML | 2023年 11月 10日 | |
Application note | Clocking Configuration of Device and Flexible Clocking For TAx5x1x Family | PDF | HTML | 2023年 11月 8日 | |
Application note | Clock Error Configuration, Detection, and Modes Supported in TAx5x1x Family | PDF | HTML | 2023年 11月 7日 |
設計與開發
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TAD5212EVM-K — TAD5212 評估模組
PUREPATHCONSOLE — 適用於音訊系統設計和開發的 PurePath™ Console 圖形開發套件
PurePath Console’s (...)
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 引腳 | 下載 |
---|---|---|
VQFN (RGE) | 24 | 檢視選項 |
訂購與品質
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