產品規格表
TCA6418E
- Operating Power-Supply Voltage Range of 1.65 V to 3.6 V
- 18 GPIOs Configurable as Inputs or Outputs
- ESD Protection Exceeds JESD 22 on Non-GPIO Pins
- 2000-V Human Body Model (A114-A)
- 1000-V Charged Device Model (C101)
- Low Standby (Idle) Current Consumption: 3 µA
- Supports 1-MHz Fast Mode Plus I2C Bus
- Open-Drain Active-Low Interrupt Output, Asserted When Key is Pressed
or Key is Released - Selectable Debounce Time of 50 µs
- Schmitt-Trigger Action Allows Slow Input Transition and
Better Switching Noise Immunity at the SCL and SDA Inputs:
Typical Vhys at 1.8 V is 0.18 V - Latch-Up Performance Exceeds 200 mA Per JESD 78, Class II
- Very Small Package
- WCSP (YFP): 2 mm × 2 mm; 0.4 mm pitch
The TCA6418E is a 18 channel GPIO expansion device with integrated ESD protection. It can operate from 1.65 V to 3.6 V and has 18 general purpose inputs/outputs (GPIO) that can be used via the I2C interface [serial clock (SCL), serial data (SDA)].
The major benefit of this device is it frees up the processor from having to individually monitor changes in multiple inputs and also frees up the GPIOs on the processor to drive other outputs.. This provides power and bandwidth savings. The TCA6418E is also ideal for usage with processors that have limited GPIOs.
技術文件
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檢視所有 6 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | I2C Controlled 18 Channel GPIO Expander datasheet | 2012年 9月 5日 | |
| Application note | I2C Dynamic Addressing | 2019年 4月 25日 | ||
| Application note | Choosing the Correct I2C Device for New Designs | PDF | HTML | 2016年 9月 7日 | |
| Application note | Understanding the I2C Bus | PDF | HTML | 2015年 6月 30日 | |
| Application note | Maximum Clock Frequency of I2C Bus Using Repeaters | 2015年 5月 15日 | ||
| Application note | I2C Bus Pull-Up Resistor Calculation | PDF | HTML | 2015年 2月 13日 |
設計與開發
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設計工具
I2C-DESIGNER — I2C 設計工具
Use the I2C Designer tool to quickly resolve conflicts in addressing, voltage level and frequency in I2C based designs. Enter master and slave inputs to automatically generate an I2C tree or easily build a custom solution. This tool will help designers save time and comply with the I2C standard (...)
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
| 封裝 | 引腳 | 下載 |
|---|---|---|
| DSBGA (YFP) | 25 | 檢視選項 |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
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