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THS6043

現行

具有關機功能的 350-mA、+/-12V ADSL CPE 和 PLC 線路驅動器

立即訂購
產品規格表

THS6043

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 2 Architecture DSL Line Driver, PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 9 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 33 BW at Acl (MHz) 120 Acl, min spec gain (V/V) 1 Vn at flatband (typ) (nV√Hz) 2.2 Vn at 1 kHz (typ) (nV√Hz) 2.4 Iq per channel (typ) (mA) 8.2 Vos (offset voltage at 25°C) (max) (mV) 16 Rail-to-rail No Features Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 68 Input bias current (max) (pA) 10000000 Offset drift (typ) (µV/°C) 20 GBW (typ) (MHz) 120 Iout (typ) (mA) 350 2nd harmonic (dBc) 67 3rd harmonic (dBc) 96 Frequency of harmonic distortion measurement (MHz) 1
Number of channels 2 Architecture DSL Line Driver, PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 9 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 33 BW at Acl (MHz) 120 Acl, min spec gain (V/V) 1 Vn at flatband (typ) (nV√Hz) 2.2 Vn at 1 kHz (typ) (nV√Hz) 2.4 Iq per channel (typ) (mA) 8.2 Vos (offset voltage at 25°C) (max) (mV) 16 Rail-to-rail No Features Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 68 Input bias current (max) (pA) 10000000 Offset drift (typ) (µV/°C) 20 GBW (typ) (MHz) 120 Iout (typ) (mA) 350 2nd harmonic (dBc) 67 3rd harmonic (dBc) 96 Frequency of harmonic distortion measurement (MHz) 1
HTSSOP (PWP) 14 32 mm² 5 x 6.4 SOIC (D) 14 51.9 mm² 8.65 x 6
  • Remote Terminal ADSL Line Driver
    • Ideal for Both Full Rate ADSL and G.Lite
    • Compatible With 1:1 Transformer Ratio
  • Low 2.1 pA/Hz Noninverting Current Noise
    • Reduces Noise Feedback Through Hybrid Into Downstream Channel
  • Wide Supply Voltage Range ±5 V to ±15 V
    • Ideal for ±12-V Operation
  • Wide Output Swing
    • 43-Vpp Differential Output Voltage, RL = 200 , ±12-V Supply
  • High Output Current
    • 350 mA (typ)
  • High Speed
    • 120 MHz (–3 dB, G=1, ±12 V, RL = 25 )
    • 1200 V/us Slew Rate (G = 4, ±12 V)
  • Low Distortion, Single-Ended, G = 4
    • –79 dBc (250 kHz, 2 Vpp, 100- load)
  • Low Power Shutdown (THS6043)
    • 300-uA Total Standby Current
  • Thermal Shutdown and Short-Circuit Protection
  • Standard SOIC, SOIC PowerPAD™ and TSSOP PowerPAD™ Package
  • Evaluation Module Available

PowerPAD is a trademark of Texas Instruments.
  • Remote Terminal ADSL Line Driver
    • Ideal for Both Full Rate ADSL and G.Lite
    • Compatible With 1:1 Transformer Ratio
  • Low 2.1 pA/Hz Noninverting Current Noise
    • Reduces Noise Feedback Through Hybrid Into Downstream Channel
  • Wide Supply Voltage Range ±5 V to ±15 V
    • Ideal for ±12-V Operation
  • Wide Output Swing
    • 43-Vpp Differential Output Voltage, RL = 200 , ±12-V Supply
  • High Output Current
    • 350 mA (typ)
  • High Speed
    • 120 MHz (–3 dB, G=1, ±12 V, RL = 25 )
    • 1200 V/us Slew Rate (G = 4, ±12 V)
  • Low Distortion, Single-Ended, G = 4
    • –79 dBc (250 kHz, 2 Vpp, 100- load)
  • Low Power Shutdown (THS6043)
    • 300-uA Total Standby Current
  • Thermal Shutdown and Short-Circuit Protection
  • Standard SOIC, SOIC PowerPAD™ and TSSOP PowerPAD™ Package
  • Evaluation Module Available

PowerPAD is a trademark of Texas Instruments.

The THS6042/3 is a high-speed line driver ideal for driving signals from the remote terminal to the central office in asymmetrical digital subscriber line (ADSL) applications. It can operate from a ±12-V supply voltage while drawing only 8.2 mA of supply current per channel. It offers low –79 dBc total harmonic distortion driving a 100- load (2 Vpp). The THS6042/3 offers a high 43-Vpp differential output swing across a 200- load from a ±12-V supply. The THS6043 features a low-power shutdown mode, consuming only 300 uA quiescent current per channel. The THS6042/3 is packaged in standard SOIC, SOIC PowerPAD, and TSSOP PowerPAD packages.

The THS6042/3 is a high-speed line driver ideal for driving signals from the remote terminal to the central office in asymmetrical digital subscriber line (ADSL) applications. It can operate from a ±12-V supply voltage while drawing only 8.2 mA of supply current per channel. It offers low –79 dBc total harmonic distortion driving a 100- load (2 Vpp). The THS6042/3 offers a high 43-Vpp differential output swing across a 200- load from a ±12-V supply. The THS6043 features a low-power shutdown mode, consuming only 300 uA quiescent current per channel. The THS6042/3 is packaged in standard SOIC, SOIC PowerPAD, and TSSOP PowerPAD packages.
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技術文件

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類型 標題 日期
* Data sheet 350 mA +/-12V ADSL CPE Line Drivers datasheet (Rev. G) 2001年 12月 11日
E-book The Signal e-book: A compendium of blog posts on op amp design topics 2017年 3月 28日
Application note Wireline Data Transmission and Reception 2010年 1月 27日
Application note Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日
Application note Active Output Impedance for ADSL Line Drivers 2002年 11月 26日
EVM User's guide THS6043EVM User's Guide 2002年 8月 13日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

THS6043 PSpice Model (Rev. A)

SLOJ155A.ZIP (40 KB) - PSpice Model
下載
模擬型號

THS6043 TINA-TI Reference Design (Rev. B)

SLAC105B.TSC (96 KB) - TINA-TI Reference Design
下載
模擬型號

THS6043 TINA-TI Spice Model (Rev. A)

SLAM034A.ZIP (4 KB) - TINA-TI Spice Model
下載
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
要求
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
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HTSSOP (PWP) 14 檢視選項
SOIC (D) 14 檢視選項
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