TLC5510A
- Analog Input Range
- TLC5510...2 V Full Scale
- TLC5510A...4 V Full Scale
- 8-Bit Resolution
- Integral Linearity Error
±0.75 LSB Max (25°C)
±1 LSB Max (–20°C to 75°C) - Differential Linearity Error
±0.5 LSB Max (25°C)
±0.75 LSB Max (–20°C to 75°C) - Maximum Conversion Rate
20 Mega-Samples per Second (MSPS) Max - 5-V Single-Supply Operation
- Low Power Consumption
TLC5510...127.5 mW Typ
TLC5510A...150 mW Typ
(includes reference resistor dissipation) - TLC5510 is Interchangeable With Sony CXD1175
- applications
- Digital TV
- Medical Imaging
- Video Conferencing
- High-Speed Data Conversion
- QAM Demodulators
The TLC5510 and TLC5510A are CMOS, 8-bit, 20 MSPS analog-to-digital converters (ADCs) that utilize a semiflash architecture. The TLC5510 and TLC5510A operate with a single 5-V supply and typically consume only 130 mW of power. Included is an internal sample-and-hold circuit, parallel outputs with high-impedance mode, and internal reference resistors.
The semiflash architecture reduces power consumption and die size compared to flash converters. By implementing the conversion in a 2-step process, the number of comparators is significantly reduced. The latency of the data output valid is 2.5 clocks.
The TLC5510 uses the three internal reference resistors to create a standard, 2-V, full-scale conversion range using VDDA. Only external jumpers are required to implement this option and eliminates the need for external reference resistors. The TLC5510A uses only the center internal resistor section with an externally applied 4-V reference such that a 4-V input signal can be used. Differential linearity is 0.5 LSB at 25°C and a maximum of 0.75 LSB over the full operating temperature range. Typical dynamic specifications include a differential gain of 1% and differential phase of 0.7 degrees.
The TLC5510 and TLC5510A are characterized for operation from -20°C to 75°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | 8-Bit High-Speed Analog-to-Digital Converters datasheet (Rev. L) | 2003年 6月 11日 | |
| Application note | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010年 9月 10日 | ||
| Application note | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009年 4月 28日 | ||
| Application note | CDCE62005 as Clock Solution for High-Speed ADCs | 2008年 9月 4日 | ||
| Application note | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008年 6月 8日 | ||
| Application note | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008年 6月 2日 | ||
| User guide | TLC5540/TLC5510/TLC5510A EVM (Rev. D) | 2002年 7月 29日 |
設計與開發
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