TLC59212
- LBC3S (Lin BiCMOS) Process
- High Voltage Output (VOUT = 24 V)
- Output Current (IOL Maximum = 40 mA)
- Latch-Up Performance Exceeds 250 mA Per
JEDEC Standard JESD-17 - ESD Protection Exceeds JESD 22
- 2000-V Human Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged Device Model (C101)
The TLC59212 device is an 8-bit open-collector driver with latch designed for 5-V VCC operation.
These circuits are positive-edge-triggered D-type flip-flops with a direct clear (CLR) input. Information at the data (D) input meeting the setup time requirements is transferred to the Y output on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D-input has no effect at the output.
The TLC59212 is characterized for operation from 40°C to 85°C.
技術文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 4 類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | 8-Bit Open-Collector Sink Driver With Latch datasheet (Rev. A) | 2015年 6月 19日 | |
White paper | Common LED Functions and LED Driver Design Considerations | 2020年 9月 21日 | ||
Application note | How to Select a RGB LED Driver | 2019年 8月 8日 | ||
Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
封裝 | 引腳 | 下載 |
---|---|---|
TSSOP (PW) | 20 | 檢視選項 |
訂購與品質
內含資訊:
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
內含資訊:
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。