TLV320DAC3100
- Stereo Audio DAC with 95-dB SNR
- Supports 8-kHz to 192-kHz Sample Rates
- Mono Class-D BTL Speaker Driver (2.5 W Into 4-Ω or 1.6 W Into 8-Ω)
- Two Single-Ended Inputs With Mixing and Output Level Control
- Stereo Headphone/Lineout and Mono Class-D Speaker Outputs Available
- Microphone Bias
- Headphone Detection
- 25 Built-in Digital Audio Processing Blocks (PRB_P1 – PRB_P25) Providing Biquad and FIR Filters, DRC, and 3-D Structures
- Digital Mixing Capability
- Pin Control or Register Control for Digital-Playback Volume-Control Settings
- Digital Sine-Wave Generator for Beeps and Key Clicks (PRB_P25)
- Programmable PLL for Flexible Clock Generation
- I2S, Left-Justified, Right-Justified, DSP, and TDM Audio Interfaces
- I2C Control With Register Auto-Increment
- Full Power-Down Control
- Power Supplies:
- Analog: 2.7 V–3.6 V
- Digital Core: 1.65 V–1.95 V
- Digital I/O: 1.1 V–3.6 V
- Class-D: 2.7 V–5.5 V (SPKVDD ≥ AVDD)
- 5-mm × 5-mm 32-VQFN Package
The TLV320DAC3100 device is a low-power, highly integrated, high-performance stereo audio DAC with 24-bit stereo playback and digital audio processing blocks.
The device integrates headphone drivers and speaker drivers. The mono speaker driver can drive loads down to 4 Ω. The TLV320DAC3100 device has a suite of built-in processing blocks for digital audio processing. The digital audio data format is programmable to work with popular audio standard protocols (I2S, left/right-justified) in master, slave, DSP, and TDM modes. Bass boost, treble, or EQ can be supported by the programmable digital signal-processing block. An on-chip PLL provides the high-speed clock needed by the digital signal-processing block. The volume level can be controlled either by pin control or by register control. The audio functions are controlled using the I2C serial bus.
The TLV320DAC3100 device has a programmable digital sine-wave generator and is available in a 32-pin VQFN package.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | TLV320DAC3100 Low-Power Stereo Audio DAC With Audio Processing and Mono Class-D Speaker Amplifier datasheet (Rev. C) | PDF | HTML | 2017年 1月 24日 |
Application note | Audio Serial Interface Configurations for Audio Codecs (Rev. A) | 2019年 6月 27日 | ||
Application note | PLL and Clocking Configuration for Audio Devices | PDF | HTML | 2019年 3月 26日 | |
Application note | TLV320AIC31xx and TLV320DAC31xx Power Consumption Characterization (Rev. B) | 2014年 9月 3日 | ||
Application note | TLV320DAC3100 Open Load Detection Test (Rev. B) | 2013年 7月 27日 | ||
Application note | TLV320DAC3100 Open Load Detection Test (Rev. A) | 2013年 4月 26日 | ||
Application note | Coefficient RAM Access Mechanisms.. (Rev. D) | 2012年 1月 25日 | ||
Application note | Audio Serial Interface Configurations for Audio Codecs | 2010年 9月 22日 | ||
Application note | Interfacing an I2S Device to an MSP430 Device (Rev. A) | 2010年 3月 22日 | ||
EVM User's guide | ACEV-1A EVM User's Guide | 2009年 12月 17日 |
設計與開發
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TLV320DAC3100EVM-U — TLV320DAC3100EVM-U 評估模組
The TLV320DAC3100EVM-U (ACEV-1A) is a complete evaluation module for the TLV320DAC3100 audio codec.
The EVM is supported by TI’s CodecControl software, a block-diagram based graphical user interface for TI audio codec’s.
The TLV320DAC3100EVM-U connects to a USB port of a PC. The USB interface (...)
TLV320DAC31XX-DRIVERS — TLV320DAC31XX DAC 系列 Linux 驅動程式支援
Linux main line status
Available in (...)
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
封裝 | 引腳 | 下載 |
---|---|---|
VQFN (RHB) | 32 | 檢視選項 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。