TPS51200-EP
- Input Voltage: Supports 2.5-V Rail and 3.3-V Rail
- VLDOIN Voltage Range: 1.1 V to 3.5 V
- Sink and Source Termination Regulator Includes
Droop Compensation - Requires Minimum Output Capacitance of 20-µF
(Typically 3 × 10-µF MLCCs) for Memory
Termination Applications (DDR) - PGOOD to Monitor Output Regulation
- EN Input
- REFIN Input Allows for Flexible Input Tracking
Either Directly or Through Resistor Divider - Remote Sensing (VOSNS)
- ±10-mA Buffered Reference (REFOUT)
- Built-in Soft Start, UVLO, and OCL
- Thermal Shutdown
- Meets DDR and DDR2 JEDEC Specifications
- Supports DDR3, Low-Power DDR3, and DDR4
VTT Applications - 10-Pin VSON Package With Thermal Pad
- Supports Defense, Aerospace, and Medical
Applications- Controlled Baseline
- One Assembly and Test Site
- One Fabrication Site
- Available in Military (–55°C to 125°C)
Temperature Range - Extended Product Life Cycle
- Extended Product-Change Notification
- Product Traceability
The TPS51200-EP device is a sink and source double data rate (DDR) termination regulator specifically designed for low-input voltage, low-cost, low-noise systems where space is a key consideration.
The TPS51200-EP maintains a fast transient response and only requires a minimum output capacitance of 20 µF. The TPS51200-EP supports a remote sensing function and all power requirements for DDR, DDR2, DDR3, Low-Power DDR3, and DDR4 VTT bus termination.
In addition, the TPS51200-EP provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.
The TPS51200-EP is available in the thermally efficient 10-pin VSON thermal pad package, and is rated both Green and Pb-free. It is specified from –55°C to +125°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS51200-EP Sink and Source DDR Termination Regulator datasheet | PDF | HTML | 2016年 6月 29日 |
| * | VID | TPS51200-EP VID V6216610 | 2018年 3月 27日 | |
| * | Radiation & reliability report | TPS51200MDRCTEP Reliability Report | 2016年 9月 21日 |
設計與開發
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TPS51200EVM — TPS51200 汲極源極 DDR 終端穩壓器
TPS51200EVM 評估板 HPA322A 旨在評估 TI 成本最佳化的 DDR/DDR2/DDR3/LP DDR3 VTT 終端穩壓器 TPS51200 的性能和特性。TPS51200 旨在為 DDR 記憶體提供適當的終止電壓與 10-mA 緩衝參考電壓，該電壓涵蓋 DDR (2.5 V/1.25 V)、DDR2 (1.8 V/0.9 V)、DDR3 (1.5 V/0.75 V)、LP DDR3 (1.2 V/0.6 V) 規格，且僅需最少外部零組件。
TPS51200 TINA-TI Start-Up Transient Reference Design
| 封裝 | 引腳 | 下載 |
|---|---|---|
| VSON (DRC) | 10 | 檢視選項 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。