UCC3810
- Single Oscillator Synchronizes Two PWMs
- 150-µA Startup Supply Current
- 2-mA Operating Supply Current
- Operation to 1 MHz
- Internal Soft-Start
- Full-Cycle Fault Restart
- Internal Leading-Edge Blanking of the Current Sense Signal
- 1-A Totem Pole Outputs
- 75-ns Typical Response from Current Sense to Output
- 1.5% Tolerance Voltage Reference
The UCC3810 is a high-speed BiCMOS controller integrating two synchronized pulse width modulators for use in off-line and dc-to-dc power supplies. The UCC3810 family provides perfect synchronization between two PWMs by usin g the same oscillator. The oscillators sawtooth waveform can be used for slope compensation if required.
Using a toggle flip-flop to alternate between modulators, the UCC3810 ensures that one PWM does not slave, interfere, or otherwise affect the other PWM. This toggle flip- flop also ensures that each PWM is limited to 50% maximum duty cycle, insuring adequate off-time to reset magnetic elements. This device contains many of the same elements of the UC3842 current mode controller family, combined with the enhancements of the UCC3802. This minimizes power supply parts count. Enhancements include leading edge blanking of the current sense signals, full cycle fault restart, CMOS output drivers, and outputs which remain low even when the supply voltage is removed.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | Dual Channel Synchronized Current Mode PWM datasheet (Rev. D) | 2004年 11月 2日 | |
Selection guide | Power Management Guide 2018 (Rev. R) | 2018年 6月 25日 | ||
Analog Design Journal | UCC28517 100-W PFC power converter with 12-V, 8-W bias supply, Part 1 | 2005年 2月 28日 | ||
Analog Design Journal | UCC28517 100-W PFC power converter with 12-V, 8-W bias supply, Part 2 | 2005年 2月 28日 | ||
More literature | Seminar 300 Topic 8 - Switching Power Supply Design Review | 2001年 2月 15日 | ||
More literature | Seminar 400 Topic 2 - Design of Flyback Transformers and Filter Inductors | 2001年 2月 15日 | ||
More literature | Seminar 900 Topic 6 - High Power Factor Prereg Using SEPIC | 2001年 2月 15日 |
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