Reinforced Isolated M-LVDS Transceiver Reference Design
TIDA-00330
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Description & Features

Technical Documents

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Description

This reference design demonstrates the performance of a reinforced, isolated, full-duplex M-LVDS transceiver node using the ISO7842 and SN65MLVD203. A single reinforced digital isolator replaces two basic digital isolators, reducing cost and PCB area.

Features
  • Reinforced Isolation: VISO = 5 kVRMS
  • Data rate up to 100 Mbps
  • M-LVDS common mode range
  • This circuit design is tested and includes Getting Started Guide

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Schematic/Block Diagram

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Test Data

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Design Files

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TI Devices (4)

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Part Number Name Product Family Sample & Buy Design Kits & Evaluation Modules
ISO7842  5.7-kVrms, 100-Mbps, reinforced 4-channel 2/2 digital isolator  Isolation  Sample & Buy View Design Kits & Evaluation Modules
SN6501  Low-noise, 350-mA, 410-kHz transformer driver for isolated power supplies  Isolation  Sample & Buy View Design Kits & Evaluation Modules
SN65MLVD203  Full-Duplex M-LVDS Transceiver  Interface  Sample & Buy View Design Kits & Evaluation Modules
TPS763  Low-power low-IQ 150-mA low-dropout (LDO) linear regulator  Power management  Sample & Buy View Design Kits & Evaluation Modules

CAD/CAE symbols

Part # Package | Pins CAD File (.bxl) STEP Model (.stp)
ISO7842 Download Download
SOIC (DWW)| 16 Download Download
SN6501 Download Download
SN65MLVD203 Download Download
TPS763 Download

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Technical Documents

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User guides (1)
Title Type Size (KB) Date
PDF 655 15 Oct 2014
White papers (1)
Title Type Size (KB) Date
PDF 699 22 Jun 2015
Design files (3)
Title Type Size (KB) Date
ZIP 305 03 Nov 2014
PDF 109 03 Nov 2014
PDF 179 03 Nov 2014

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